On Fri, Oct 18, 2024 at 01:49:33PM -0700, Matt Atwood wrote:
> From: Dnyaneshwar Bhadane <[email protected]>
> 
> The async flip moved from PLANE_CTL to PLANE_SURF for PTL.

The subject and commit message should be referring to Xe3_LPD rather
than Panther Lake.  This is a change in the display IP and if other
non-PTL platforms eventually re-use this IP, the change will apply to
them as well.

> Bspec: 69853,69878
> 

No blank line here.  We write bspec references as a git trailer.


Matt

> Signed-off-by: Dnyaneshwar Bhadane <[email protected]>
> Signed-off-by: Matt Atwood <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/skl_universal_plane.c  | 13 +++++++++----
>  .../gpu/drm/i915/display/skl_universal_plane_regs.h |  1 +
>  2 files changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index a0a7ed01415a..da974f4a25bd 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1567,17 +1567,22 @@ skl_plane_async_flip(struct intel_dsb *dsb,
>       struct intel_display *display = to_intel_display(plane->base.dev);
>       enum plane_id plane_id = plane->id;
>       enum pipe pipe = plane->pipe;
> -     u32 plane_ctl = plane_state->ctl;
> +     u32 plane_ctl = plane_state->ctl, plane_surf;
>  
>       plane_ctl |= skl_plane_ctl_crtc(crtc_state);
> +     plane_surf = skl_plane_surf(plane_state, 0);
>  
> -     if (async_flip)
> -             plane_ctl |= PLANE_CTL_ASYNC_FLIP;
> +     if (async_flip){
> +             if (DISPLAY_VER(display) >= 30)
> +                     plane_surf |= PLANE_SURF_ASYNC_UPDATE;
> +             else
> +                     plane_ctl |= PLANE_CTL_ASYNC_FLIP;
> +     }
>  
>       intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),
>                          plane_ctl);
>       intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),
> -                        skl_plane_surf(plane_state, 0));
> +                        plane_surf);
>  }
>  
>  static bool intel_format_is_p01x(u32 format)
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h 
> b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> index 4ddcd7d46bbd..ff31a00d511e 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> @@ -159,6 +159,7 @@
>                                                       _PLANE_SURF_2_A, 
> _PLANE_SURF_2_B)
>  #define   PLANE_SURF_ADDR_MASK                       REG_GENMASK(31, 12)
>  #define   PLANE_SURF_DECRYPT                 REG_BIT(2)
> +#define   PLANE_SURF_ASYNC_UPDATE            REG_BIT(0)
>  
>  #define _PLANE_KEYMAX_1_A                    0x701a0
>  #define _PLANE_KEYMAX_2_A                    0x702a0
> -- 
> 2.45.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

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