> -----Original Message----- > From: Nautiyal, Ankit K <[email protected]> > Sent: 20 November 2024 18:26 > To: Golani, Mitulkumar Ajitkumar <[email protected]>; > [email protected] > Cc: [email protected]; Nikula, Jani <[email protected]> > Subject: Re: [PATCH v4 2/5] drm/i915/vrr: Update vrr.vsync_{start, end} > computation > > > On 11/20/2024 2:19 PM, Mitul Golani wrote: > > vrr.vsync_{start,end} computation should not depend on > > crtc_state->vrr.enable. Also add them to state dump. > > Need to update the commit message. > > Also need to send to [email protected].
Right, I missed adding [email protected]. I will add in next revision update. Regards, Mitul > > Regards, > > Ankit > > > > > --v1: > > - Explain commit message more clearly [Jani] > > - Instead of tweaking to fastset use vrr.flipline while computing AS_SDP. > > --v2: > > - Correct computation of vrr.vsync_start/end should not depend on > > vrr.enable.[ville] > > - vrr enable disable requirement should not obstruct by SDP enable > > disable requirements. [Ville] > > --v3: > > - Create separate patch for crtc_state_dump [Ankit]. > > > > Signed-off-by: Mitul Golani <[email protected]> > > --- > > drivers/gpu/drm/i915/display/intel_vrr.c | 25 ++++++++++-------------- > > 1 file changed, 10 insertions(+), 15 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c > > b/drivers/gpu/drm/i915/display/intel_vrr.c > > index b386e62d1664..c395af419ce3 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > > @@ -236,7 +236,7 @@ intel_vrr_compute_config(struct intel_crtc_state > *crtc_state, > > crtc_state->mode_flags |= I915_MODE_FLAG_VRR; > > } > > > > - if (intel_dp->as_sdp_supported && crtc_state->vrr.enable) { > > + if (HAS_AS_SDP(display)) { > > crtc_state->vrr.vsync_start = > > (crtc_state->hw.adjusted_mode.crtc_vtotal - > > crtc_state->hw.adjusted_mode.vsync_start); > > @@ -316,6 +316,12 @@ void intel_vrr_set_transcoder_timings(const struct > intel_crtc_state *crtc_state) > > trans_vrr_ctl(crtc_state)); > > intel_de_write(display, TRANS_VRR_FLIPLINE(display, > cpu_transcoder), > > crtc_state->vrr.flipline - 1); > > + > > + if (HAS_AS_SDP(display)) > > + intel_de_write(display, > > + TRANS_VRR_VSYNC(display, cpu_transcoder), > > + VRR_VSYNC_END(crtc_state->vrr.vsync_end) | > > + VRR_VSYNC_START(crtc_state->vrr.vsync_start)); > > } > > > > void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) > > @@ -352,12 +358,6 @@ void intel_vrr_enable(const struct intel_crtc_state > *crtc_state) > > intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), > > TRANS_PUSH_EN); > > > > - if (HAS_AS_SDP(display)) > > - intel_de_write(display, > > - TRANS_VRR_VSYNC(display, cpu_transcoder), > > - VRR_VSYNC_END(crtc_state->vrr.vsync_end) | > > - VRR_VSYNC_START(crtc_state->vrr.vsync_start)); > > - > > if (crtc_state->cmrr.enable) { > > intel_de_write(display, TRANS_VRR_CTL(display, > cpu_transcoder), > > VRR_CTL_VRR_ENABLE | > VRR_CTL_CMRR_ENABLE | @@ -382,10 > > +382,6 @@ void intel_vrr_disable(const struct intel_crtc_state > *old_crtc_state) > > TRANS_VRR_STATUS(display, > cpu_transcoder), > > VRR_STATUS_VRR_EN_LIVE, 1000); > > intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); > > - > > - if (HAS_AS_SDP(display)) > > - intel_de_write(display, > > - TRANS_VRR_VSYNC(display, cpu_transcoder), 0); > > } > > > > void intel_vrr_get_config(struct intel_crtc_state *crtc_state) @@ > > -425,10 +421,6 @@ void intel_vrr_get_config(struct intel_crtc_state > *crtc_state) > > > TRANS_VRR_VMAX(display, cpu_transcoder)) + 1; > > crtc_state->vrr.vmin = intel_de_read(display, > > TRANS_VRR_VMIN(display, > cpu_transcoder)) + 1; > > - } > > - > > - if (crtc_state->vrr.enable) { > > - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; > > > > if (HAS_AS_SDP(display)) { > > trans_vrr_vsync = > > @@ -440,4 +432,7 @@ void intel_vrr_get_config(struct intel_crtc_state > *crtc_state) > > REG_FIELD_GET(VRR_VSYNC_END_MASK, > trans_vrr_vsync); > > } > > } > > + > > + if (crtc_state->vrr.enable) > > + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; > > }
