> -----Original Message-----
> From: Intel-gfx <[email protected]> On Behalf Of Swati
> Sharma
> Sent: Tuesday, December 10, 2024 7:36 PM
> To: [email protected]
> Cc: Nautiyal, Ankit K <[email protected]>; Sharma, Swati2
> <[email protected]>
> Subject: [PATCH 1/1] drm/i915/dsc: Expose dsc sink max slice count via
> debugfs
>
> Expose dsc sink max slice count via i915_dsc_fec_support debugfs.
> This debugfs entry is required in cases, where sink doesn't support minimum
> of 8 slices in case of ultrajoiner and minimum of 4 slices in case of big
> joiner.
>
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/3387
> Signed-off-by: Swati Sharma <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 3eb7565cd83c..4823d27cafb5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1013,6 +1013,12 @@ static int i915_dsc_fec_support_show(struct
> seq_file *m, void *data)
>
> DP_DSC_YCbCr444)));
> seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
> drm_dp_dsc_sink_bpp_incr(connector-
> >dp.dsc_dpcd));
> + if (intel_dp_is_edp(intel_dp))
> + seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n",
> +
> drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), true));
> + else
> + seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n",
> +
> drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd),
> +false));
LGTM,
Reviewed-by: Nemesa Garg <[email protected]>
> seq_printf(m, "Force_DSC_Enable: %s\n",
> str_yes_no(intel_dp->force_dsc_en));
> if (!intel_dp_is_edp(intel_dp))
> --
> 2.25.1
