On Mon, 13 Jan 2025, Imre Deak <[email protected]> wrote:
> Enable the DP tunneling functionality in the xe driver.
>
> Signed-off-by: Imre Deak <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_tunnel.h |  5 +++--
>  drivers/gpu/drm/xe/Kconfig                     | 14 ++++++++++++++
>  drivers/gpu/drm/xe/Makefile                    |  3 +++
>  3 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h 
> b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> index e9314cf25a193..7a91b4945eb8d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> @@ -20,7 +20,8 @@ struct intel_dp;
>  struct intel_encoder;
>  struct intel_link_bw_limits;
>  
> -#if IS_ENABLED(CONFIG_DRM_I915_DP_TUNNEL) && defined(I915)
> +#if (defined(CONFIG_DRM_I915_DP_TUNNEL) && defined(I915)) || \
> +     (defined(CONFIG_DRM_XE_DP_TUNNEL) && !defined(I915))

Please retain IS_ENABLED for checking kconfig symbols.

>  int intel_dp_tunnel_detect(struct intel_dp *intel_dp, struct 
> drm_modeset_acquire_ctx *ctx);
>  void intel_dp_tunnel_disconnect(struct intel_dp *intel_dp);
> @@ -127,6 +128,6 @@ intel_dp_tunnel_mgr_init(struct intel_display *display)
>  
>  static inline void intel_dp_tunnel_mgr_cleanup(struct intel_display 
> *display) {}
>  
> -#endif /* CONFIG_DRM_I915_DP_TUNNEL */
> +#endif /* CONFIG_DRM_I915_DP_TUNNEL || CONFIG_DRM_XE_DP_TUNNEL */
>  
>  #endif /* __INTEL_DP_TUNNEL_H__ */
> diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig
> index b51a2bde73e29..50cf80df51900 100644
> --- a/drivers/gpu/drm/xe/Kconfig
> +++ b/drivers/gpu/drm/xe/Kconfig
> @@ -59,6 +59,20 @@ config DRM_XE_DISPLAY
>       help
>         Disable this option only if you want to compile out display support.
>  
> +config DRM_XE_DP_TUNNEL
> +     bool "Enable DP tunnel support"
> +     depends on DRM_XE
> +     depends on USB4
> +     select DRM_DISPLAY_DP_TUNNEL
> +     default y
> +     help
> +       Choose this option to detect DP tunnels and enable the Bandwidth
> +       Allocation mode for such tunnels. This allows using the maximum
> +       resolution allowed by the link BW on all displays sharing the
> +       link BW, for instance on a Thunderbolt link.
> +
> +       If in doubt say "Y".
> +

I'm sort of wondering why we have this (and the i915 one) as
user-selectable config options at all. Is it ever reasonable for the
user to disable this if USB4 is enabled?

BR,
Jani.


>  config DRM_XE_FORCE_PROBE
>       string "Force probe xe for selected Intel hardware IDs"
>       depends on DRM_XE
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 5c97ad6ed7385..81f63258a7e19 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -301,6 +301,9 @@ ifeq ($(CONFIG_DEBUG_FS),y)
>               i915-display/intel_pipe_crc.o
>  endif
>  
> +xe-$(CONFIG_DRM_XE_DP_TUNNEL) += \
> +     i915-display/intel_dp_tunnel.o
> +
>  obj-$(CONFIG_DRM_XE) += xe.o
>  obj-$(CONFIG_DRM_XE_KUNIT_TEST) += tests/

-- 
Jani Nikula, Intel

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