Panel replay is supported from display 14 onwards. So no need
to check the panel replay status in the previous gen workarounds.
In the newer panel replay, selective update is supported and it
is suffice to check selective update status for the workarounds
in FBC use cases.

Bspec: 66624, 50442
Signed-off-by: Vinod Govindapillai <vinod.govindapil...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 92b00da4c0ab..2dc8ff734b11 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1471,8 +1471,7 @@ static int intel_fbc_check_plane(struct 
intel_atomic_state *state,
         * disabling PSR2, keep FBC disabled in case of selective update is on
         * until the selection logic is implemented.
         */
-       if (DISPLAY_VER(display) >= 12 && crtc_state->has_sel_update &&
-           !crtc_state->has_panel_replay) {
+       if (DISPLAY_VER(display) >= 12 && crtc_state->has_sel_update) {
                plane_state->no_fbc_reason = "PSR2 enabled";
                return 0;
        }
@@ -1480,7 +1479,7 @@ static int intel_fbc_check_plane(struct 
intel_atomic_state *state,
        /* Wa_14016291713 */
        if ((IS_DISPLAY_VER(display, 12, 13) ||
             IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_C0)) &&
-           crtc_state->has_psr && !crtc_state->has_panel_replay) {
+           crtc_state->has_psr) {
                plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
                return 0;
        }
-- 
2.43.0

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