On Fri, 18 Apr 2025, Julia Filipchuk <julia.filipc...@intel.com> wrote:
> For newer platforms (post DG2) hardware intentionally stalls on
> submisstion of concurrent RCS and CCS of different address spaces. With
> this workaround GuC will never schedule such conlicting contexts;
> preventing detection of a stall as a hang.
>
> GuC specs recommend to enable this for all platforms starting from MTL
> supporting CCS.
>
> Signed-off-by: Julia Filipchuk <julia.filipc...@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.h | 8 ++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 9 ++++++---
> 2 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
> b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 998ca029b73a..2f86b2291826 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -24,6 +24,14 @@ struct drm_printer;
> GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
> GRAPHICS_VER_FULL((gt)->i915) <= (until)))
>
> +/*
> + * Check that the GT is a graphics GT and has atleast minimum IP version.
> + */
> +#define IS_GFX_GT_IP_ATLEAST(gt, from) ( \
> + BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
> + ((gt)->type != GT_MEDIA && \
> + GRAPHICS_VER_FULL((gt)->i915) >= (from)))
> +
> /*
> * Check that the GT is a media GT and has an IP version within the
> * specified range (inclusive).
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 9df80c325fc1..70c83c1588e9 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -313,8 +313,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
> *
> * The same WA bit is used for both and 22011391025 is applicable to
> * all DG2.
> + *
> + * Platforms post DG2 prevent behavior in hardware. This is implicitly
> + * enabled to give guc management over CCS scheduling.
> */
> - if (IS_DG2(gt->i915))
> + if (IS_DG2(gt->i915) ||
> + (CCS_MASK(gt) && IS_GFX_GT_IP_ATLEAST(gt, IP_VER(12, 70))))
> flags |= GUC_WA_DUAL_QUEUE;
GRAPHICS_VER_FULL((gt)->i915) >= IP_VER(12, 70)
You don't need an extra macro for a single use case that is covered by
existing macros.
BR,
Jani.
>
> /* Wa_22011802037: graphics version 11/12 */
> @@ -322,8 +326,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
> flags |= GUC_WA_PRE_PARSER;
>
> /*
> - * Wa_22012727170
> - * Wa_22012727685
> + * Wa_22012727170 Wa_22012727685
> */
> if (IS_DG2_G11(gt->i915))
> flags |= GUC_WA_CONTEXT_ISOLATION;
--
Jani Nikula, Intel
