On 4/21/2025 9:18 PM, Mitul Golani wrote:
Prepare state check param for enabling dc balance enable bit.
This patch can be squashed into the previous patch. Regards, Ankit
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.gol...@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4a21acb88aa7..0bb39134f52d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5402,6 +5402,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_LLI(cmrr.cmrr_m); PIPE_CONF_CHECK_LLI(cmrr.cmrr_n); PIPE_CONF_CHECK_BOOL(cmrr.enable); + PIPE_CONF_CHECK_BOOL(vrr.dc_balance.enable); PIPE_CONF_CHECK_I(vrr.dc_balance.vmin); PIPE_CONF_CHECK_I(vrr.dc_balance.vmax); PIPE_CONF_CHECK_I(vrr.dc_balance.guardband); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index e8802348e5fa..7c09f384a684 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -804,6 +804,7 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)if (HAS_DC_BALANCE(display)) {dcb_ctl = intel_de_read(display, PIPEDMC_DCB_CTL(display, cpu_transcoder)); + crtc_state->vrr.dc_balance.enable = dcb_ctl & PIPEDMC_ADAPTIVE_DCB_ENABLE; crtc_state->vrr.dc_balance.vmin = intel_de_read(display, PIPEDMC_DCB_VMIN(display, cpu_transcoder)) + 1; crtc_state->vrr.dc_balance.vmax =
