Quoting Jani Nikula (2025-05-06 10:06:45-03:00)
>All users of vlv_display_irq_postinstall() outside of
>intel_display_irq.c have a lock/unlock pair. Move the locking inside the
>function. Add an unlocked variant for internal use, similar to the
>_vlv_display_irq_reset() and vlv_display_irq_reset() functions.
>
>Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.so...@intel.com>
>---
> .../gpu/drm/i915/display/intel_display_irq.c | 17 ++++++++++++-----
> drivers/gpu/drm/i915/i915_irq.c | 4 ----
> 2 files changed, 12 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
>b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 3d2294a4d83d..a0e08b8752e7 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -1908,16 +1908,13 @@ static u32 vlv_error_mask(void)
> return VLV_ERROR_PAGE_TABLE;
> }
>
>-void vlv_display_irq_postinstall(struct intel_display *display)
>+static void _vlv_display_irq_postinstall(struct intel_display *display)
> {
> struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 pipestat_mask;
> u32 enable_mask;
> enum pipe pipe;
>
>- if (!display->irq.vlv_display_irqs_enabled)
>- return;
>-
> if (display->platform.cherryview)
> intel_de_write(display, DPINVGTT,
> DPINVGTT_STATUS_MASK_CHV |
>@@ -1954,6 +1951,16 @@ void vlv_display_irq_postinstall(struct intel_display
>*display)
> intel_display_irq_regs_init(display, VLV_IRQ_REGS,
> dev_priv->irq_mask, enable_mask);
> }
>
>+void vlv_display_irq_postinstall(struct intel_display *display)
>+{
>+ struct drm_i915_private *dev_priv = to_i915(display->drm);
>+
>+ spin_lock_irq(&dev_priv->irq_lock);
>+ if (display->irq.vlv_display_irqs_enabled)
>+ _vlv_display_irq_postinstall(display);
>+ spin_unlock_irq(&dev_priv->irq_lock);
>+}
>+
> void ibx_display_irq_reset(struct intel_display *display)
> {
> struct drm_i915_private *i915 = to_i915(display->drm);
>@@ -2126,7 +2133,7 @@ void valleyview_enable_display_irqs(struct intel_display
>*display)
>
> if (intel_irqs_enabled(dev_priv)) {
> _vlv_display_irq_reset(display);
>- vlv_display_irq_postinstall(display);
>+ _vlv_display_irq_postinstall(display);
> }
>
> out:
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index b918b440cbce..19d8a7c29eac 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -768,9 +768,7 @@ static void valleyview_irq_postinstall(struct
>drm_i915_private *dev_priv)
>
> gen5_gt_irq_postinstall(to_gt(dev_priv));
>
>- spin_lock_irq(&dev_priv->irq_lock);
> vlv_display_irq_postinstall(display);
>- spin_unlock_irq(&dev_priv->irq_lock);
>
> intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER,
> MASTER_INTERRUPT_ENABLE);
> intel_uncore_posting_read(&dev_priv->uncore, VLV_MASTER_IER);
>@@ -827,9 +825,7 @@ static void cherryview_irq_postinstall(struct
>drm_i915_private *dev_priv)
>
> gen8_gt_irq_postinstall(to_gt(dev_priv));
>
>- spin_lock_irq(&dev_priv->irq_lock);
> vlv_display_irq_postinstall(display);
>- spin_unlock_irq(&dev_priv->irq_lock);
>
> intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ,
> GEN8_MASTER_IRQ_CONTROL);
> intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ);
>--
>2.39.5
>
