On Fri, 2025-05-16 at 12:17 +0000, Kahola, Mika wrote: > > -----Original Message----- > > From: Hogander, Jouni <[email protected]> > > Sent: Friday, 16 May 2025 9.30 > > To: [email protected]; [email protected] > > Cc: Kahola, Mika <[email protected]>; Hogander, Jouni > > <[email protected]> > > Subject: [PATCH v2] drm/i915/psr: Do not read PSR2_SU_STATUS on > > AlderLake and onwards > > > > Bspec comment on PSR2_SU_STATUS: > > > > "This register has been tied-off since DG2/ADL-P (it returns zeros > > only) and it has been removed on Xe2_LPD." > > > > v2: fix inversed logic > > > > Bspec: 69889 > > Indeed, the logic slipped inversed. > > Reviewed-by: Mika Kahola <[email protected]>
Thank you Mika for the review. This is now pushed to drm-intel-next. BR, Jouni Högander > > > Signed-off-by: Jouni Högander <[email protected]> > > --- > > drivers/gpu/drm/i915/display/intel_psr.c | 34 ++++++++++++++------ > > ---- > > 1 file changed, 20 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > > b/drivers/gpu/drm/i915/display/intel_psr.c > > index 430ad4ef7146..cd833b63ea6b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > @@ -4021,24 +4021,30 @@ static int intel_psr_status(struct seq_file > > *m, struct intel_dp *intel_dp) > > int frame; > > > > /* > > - * Reading all 3 registers before hand to minimize > > crossing a > > - * frame boundary between register reads > > + * PSR2_SU_STATUS register has been tied-off since > > DG2/ADL-P > > + * (it returns zeros only) and it has been removed > > on Xe2_LPD. > > */ > > - for (frame = 0; frame < PSR2_SU_STATUS_FRAMES; > > frame += 3) { > > - val = intel_de_read(display, > > - > > PSR2_SU_STATUS(display, cpu_transcoder, frame)); > > - su_frames_val[frame / 3] = val; > > - } > > + if (DISPLAY_VER(display) < 13) { > > + /* > > + * Reading all 3 registers before hand to > > minimize crossing a > > + * frame boundary between register reads > > + */ > > + for (frame = 0; frame < > > PSR2_SU_STATUS_FRAMES; frame += 3) { > > + val = intel_de_read(display, > > + > > PSR2_SU_STATUS(display, cpu_transcoder, frame)); > > + su_frames_val[frame / 3] = val; > > + } > > > > - seq_puts(m, "Frame:\tPSR2 SU blocks:\n"); > > + seq_puts(m, "Frame:\tPSR2 SU blocks:\n"); > > > > - for (frame = 0; frame < PSR2_SU_STATUS_FRAMES; > > frame++) { > > - u32 su_blocks; > > + for (frame = 0; frame < > > PSR2_SU_STATUS_FRAMES; frame++) { > > + u32 su_blocks; > > > > - su_blocks = su_frames_val[frame / 3] & > > - PSR2_SU_STATUS_MASK(frame); > > - su_blocks = su_blocks >> > > PSR2_SU_STATUS_SHIFT(frame); > > - seq_printf(m, "%d\t%d\n", frame, > > su_blocks); > > + su_blocks = su_frames_val[frame / > > 3] & > > + PSR2_SU_STATUS_MASK(frame) > > ; > > + su_blocks = su_blocks >> > > PSR2_SU_STATUS_SHIFT(frame); > > + seq_printf(m, "%d\t%d\n", frame, > > su_blocks); > > + } > > } > > > > seq_printf(m, "PSR2 selective fetch: %s\n", > > -- > > 2.43.0 >
