Display version 30.02 should be treated the same as other Xe3 IP.
So exteding DMC load path the condition for it.

Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhad...@intel.com>
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumu...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c 
b/drivers/gpu/drm/i915/display/intel_dmc.c
index a10e56e7cf31..1295d8245a2e 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -179,7 +179,8 @@ static const char *dmc_firmware_default(struct 
intel_display *display, u32 *size
        const char *fw_path = NULL;
        u32 max_fw_size = 0;
 
-       if (DISPLAY_VERx100(display) == 3000) {
+       if (DISPLAY_VERx100(display) == 3002 ||
+           DISPLAY_VERx100(display) == 3000) {
                fw_path = XE3LPD_DMC_PATH;
                max_fw_size = XE2LPD_DMC_MAX_FW_SIZE;
        } else if (DISPLAY_VERx100(display) == 2000) {
-- 
2.34.1

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