On Fri, 04 Jul 2025, Christian König <christian.koe...@amd.com> wrote: > On 04.07.25 14:00, Jani Nikula wrote: >> On Fri, 04 Jul 2025, Aakash Deep Sarkar <aakash.deep.sar...@intel.com> wrote: >>> dma_fence_wait_timeout returns a long type but the driver is >>> only using the lower 32 bits of the retval and discarding the >>> upper 32 bits. >>> >>> This is particularly problematic if there are already signalled >>> or stub fences on some of the hw planes. In this case the >>> dma_fence_wait_timeout function will immediately return with >>> timeout value MAX_SCHEDULE_TIMEOUT (0x7fffffffffffffff) since >>> the fence is already signalled. > > That is not correct. If the fence is signaled dma_fence_wait_timeout() > returns the remaining timeout or at least 1 if the input timeout was > 0. > > Could be that i915 has a separately implemented fence_ops->wait > callback which incorrectly returns MAX_SCHEDULE_TIMEOUT, but i > strongly doubt that because that would break tons of stuff.
Thanks, good thing I Cc'd folks. :) BR, Jani. -- Jani Nikula, Intel
