Handle the bypass logic for the M/N ratio limit for DP. Calculate the M/N ratio, check if it can bypass the limit, and set the appropriate flags for the workaround.
Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 1 - drivers/gpu/drm/i915/display/intel_display.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++++++++- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index bb50928762f6..ee15289221d7 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3406,7 +3406,6 @@ void bmg_bypass_m_n_limit_read(struct intel_crtc *crtc, m_n->bypass_m_n_ratio_limit = true; } -static bool intel_display_can_bypass_m_n_limit(struct intel_display *display, int m_n_ratio, enum pipe pipe) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index bfa3db219b9c..a7134dd15687 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -562,5 +562,7 @@ int intel_crtc_num_joined_pipes(const struct intel_crtc_state *crtc_state); void intel_display_get_link_m_n(u32 *link_m, u32 *link_n, u32 pixel_clock, u32 link_clock); +bool intel_display_can_bypass_m_n_limit(struct intel_display *display, + int m_n_ratio, enum pipe pipe); #endif diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index a1114d1059dd..a5ab7d694dbe 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3012,10 +3012,19 @@ void intel_dp_check_m_n_ratio(struct intel_crtc_state *crtc_state, m_n_ratio = DIV_ROUND_UP(m_n->link_m, m_n->link_n); - if (m_n_ratio > intel_dp_get_max_m_n_ratio()) + if (m_n_ratio > intel_dp_get_max_m_n_ratio()) { + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + enum pipe pipe = crtc->pipe; + + if (intel_display_can_bypass_m_n_limit(display, m_n_ratio, pipe)) { + m_n->bypass_m_n_ratio_limit = true; + drm_dbg_kms(display->drm, "Bypassing Link_m/Link_n ratio limit\n"); + return; + } drm_WARN(display->drm, 1, "Link M/N ratio (%d) exceeds max allowed (%d)\n", m_n_ratio, intel_dp_get_max_m_n_ratio()); + } } static void -- 2.45.2