On Thu, 31 Jul 2025, Nemesa Garg <nemesa.g...@intel.com> wrote:
> Before enabling the scaler mask the bit and after
> enabling the scaler, in the later stage after
> waiting for a frame unmask the PS_ECC bit and
> ERR_FATAL_MASK bit.
> Unmasking of DISPLAY_ERR_FATAL_MASK bit is use
> for validation purpose. There is no functional
> imapct.
>
> v2: Remove intel_display_need_wa [Jani]
Ugh, this is not what I meant.
Do use intel_display_wa(display, 14011503117).
Do not add static bool intel_display_needs_wa_14011503117() inside
intel_display_wa.c.
BR,
Jani.
> Optimise the ecc_unmask call[Animesh]
>
> Signed-off-by: Nemesa Garg <nemesa.g...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 ++++
> drivers/gpu/drm/i915/display/skl_scaler.c | 28 ++++++++++++++++++++
> drivers/gpu/drm/i915/display/skl_scaler.h | 4 +++
> 3 files changed, 37 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7035c1fc9033..08cc747638ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1081,6 +1081,11 @@ static void intel_post_plane_update(struct
> intel_atomic_state *state,
> if (audio_enabling(old_crtc_state, new_crtc_state))
> intel_encoders_audio_enable(state, crtc);
>
> + if (DISPLAY_VER(display) == 13) {
> + if (old_crtc_state->pch_pfit.enabled !=
> new_crtc_state->pch_pfit.enabled)
> + adl_scaler_ecc_unmask(new_crtc_state);
> + }
> +
> intel_alpm_post_plane_update(state, crtc);
>
> intel_psr_post_plane_update(state, crtc);
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 4cc55f4e1f9f..cadfcb549ae8 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -762,6 +762,9 @@ void skl_pfit_enable(const struct intel_crtc_state
> *crtc_state)
> crtc_state->scaler_state.scaler_id < 0))
> return;
>
> + if (DISPLAY_VER(display) == 13)
> + adl_scaler_ecc_mask(crtc_state);
> +
> drm_rect_init(&src, 0, 0,
> drm_rect_width(&crtc_state->pipe_src) << 16,
> drm_rect_height(&crtc_state->pipe_src) << 16);
> @@ -938,3 +941,28 @@ void skl_scaler_get_config(struct intel_crtc_state
> *crtc_state)
> else
> scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
> }
> +
> +void adl_scaler_ecc_mask(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> +
> + if (!crtc_state->pch_pfit.enabled)
> + return;
> +
> + intel_de_write(display, XELPD_DISPLAY_ERR_FATAL_MASK, ~0);
> +}
> +
> +void adl_scaler_ecc_unmask(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + const struct intel_crtc_scaler_state *scaler_state =
> + &crtc_state->scaler_state;
> + int id;
> +
> + if (!scaler_state && scaler_state->scaler_id == -1)
> + return;
> +
> + intel_de_write_fw(display, SKL_PS_ECC_STAT(crtc->pipe, id), 1);
> + intel_de_write(display, XELPD_DISPLAY_ERR_FATAL_MASK, 0);
> +}
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h
> b/drivers/gpu/drm/i915/display/skl_scaler.h
> index 692716dd7616..79183d9ecc3b 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -44,4 +44,8 @@ skl_scaler_mode_valid(struct intel_display *display,
> enum intel_output_format output_format,
> int num_joined_pipes);
>
> +void adl_scaler_ecc_mask(const struct intel_crtc_state *crtc_state);
> +
> +void adl_scaler_ecc_unmask(const struct intel_crtc_state *crtc_state);
> +
> #endif
--
Jani Nikula, Intel
