Hi Zhanjun,
On Tue, Aug 19, 2025 at 12:00:10PM -0400, Zhanjun Dong wrote:
> Boolean flag access from interrupt context might have synchronous issue on
/synchronous/synchronization/
/issue/issues/
> multiple processor platform, flage modified by one core might be read as an
/flage/flags/
> old value by another core. This issue on interrupt enable flag might causes
> interrupt missing or leakage.
/missing/misses/
> Fixed by change the data type as automic to add memory synchronization.
This can be re-written: "Change the interrupts.enable type to
atomic to ensure memory synchronization."
>
> Fixes: a187f13d51fa0 ("drm/i915/guc: handle interrupts from media GuC")
What issue are you exactly trying to fix? And have you tested
that this patch is this really fixing it? Where is the flag's
misalignment happening?
Please remember that when in interrupt context you are already
running in atomic, so that probably you don't need to have an
additional atomic access to variables.
Andi
> Signed-off-by: Zhanjun Dong <zhanjun.d...@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
