[PATCH 5/6] drm/i915/irq: change ILK irq handling order

[Jani Nikula]

Handle GEN6_PMIIR before DEIIR. This allows us to further refactor
display irq handling, but separate this change to give us a clean bisect
landing commit for the unlikely case that this makes a difference.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 90174ce9195c..312f7e42931a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -449,6 +449,15 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
                ret = IRQ_HANDLED;
        }
 
+       if (GRAPHICS_VER(i915) >= 6) {
+               u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR);
+               if (pm_iir) {
+                       raw_reg_write(regs, GEN6_PMIIR, pm_iir);
+                       gen6_rps_irq_handler(&to_gt(i915)->rps, pm_iir);
+                       ret = IRQ_HANDLED;
+               }
+       }
+
        de_iir = raw_reg_read(regs, DEIIR);
        if (de_iir) {
                raw_reg_write(regs, DEIIR, de_iir);
@@ -459,15 +468,6 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg)
                ret = IRQ_HANDLED;
        }
 
-       if (GRAPHICS_VER(i915) >= 6) {
-               u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR);
-               if (pm_iir) {
-                       raw_reg_write(regs, GEN6_PMIIR, pm_iir);
-                       gen6_rps_irq_handler(&to_gt(i915)->rps, pm_iir);
-                       ret = IRQ_HANDLED;
-               }
-       }
-
        raw_reg_write(regs, DEIER, de_ier);
        if (sde_ier)
                raw_reg_write(regs, SDEIER, sde_ier);
-- 
2.47.3