[PATCH 5/5] drm/i915/irq: add ilk_display_irq_reset()

[Jani Nikula]

Abstract ilk_display_irq_reset(), moving display related reset
there. This results in a slightly different order for the reset,
hopefully with no impact.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c    | 17 ++++++++++++++++-
 .../gpu/drm/i915/display/intel_display_irq.h    |  2 +-
 drivers/gpu/drm/i915/i915_irq.c                 | 11 +----------
 3 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c 
b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 93c2e42f98c9..91ca62d9f067 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1985,7 +1985,7 @@ void vlv_display_irq_postinstall(struct intel_display 
*display)
        spin_unlock_irq(&display->irq.lock);
 }
 
-void ibx_display_irq_reset(struct intel_display *display)
+static void ibx_display_irq_reset(struct intel_display *display)
 {
        if (HAS_PCH_NOP(display))
                return;
@@ -1996,6 +1996,21 @@ void ibx_display_irq_reset(struct intel_display *display)
                intel_de_write(display, SERR_INT, 0xffffffff);
 }
 
+void ilk_display_irq_reset(struct intel_display *display)
+{
+       struct intel_uncore *uncore = to_intel_uncore(display->drm);
+
+       gen2_irq_reset(uncore, DE_IRQ_REGS);
+       display->irq.ilk_de_imr_mask = ~0u;
+
+       if (display->platform.haswell) {
+               intel_de_write(display, EDP_PSR_IMR, 0xffffffff);
+               intel_de_write(display, EDP_PSR_IIR, 0xffffffff);
+       }
+
+       ibx_display_irq_reset(display);
+}
+
 void gen8_display_irq_reset(struct intel_display *display)
 {
        enum pipe pipe;
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h 
b/drivers/gpu/drm/i915/display/intel_display_irq.h
index c66db3851da4..cee120347064 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -56,7 +56,7 @@ u32 gen11_gu_misc_irq_ack(struct intel_display *display, 
const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
 
 void i9xx_display_irq_reset(struct intel_display *display);
-void ibx_display_irq_reset(struct intel_display *display);
+void ilk_display_irq_reset(struct intel_display *display);
 void vlv_display_irq_reset(struct intel_display *display);
 void gen8_display_irq_reset(struct intel_display *display);
 void gen11_display_irq_reset(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ab65402bc6bf..1571f9de3c71 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -658,20 +658,11 @@ static void ilk_irq_reset(struct drm_i915_private 
*dev_priv)
        struct intel_display *display = dev_priv->display;
        struct intel_uncore *uncore = &dev_priv->uncore;
 
-       gen2_irq_reset(uncore, DE_IRQ_REGS);
-       display->irq.ilk_de_imr_mask = ~0u;
-
        if (GRAPHICS_VER(dev_priv) == 7)
                intel_uncore_write(uncore, GEN7_ERR_INT, 0xffffffff);
 
-       if (IS_HASWELL(dev_priv)) {
-               intel_uncore_write(uncore, EDP_PSR_IMR, 0xffffffff);
-               intel_uncore_write(uncore, EDP_PSR_IIR, 0xffffffff);
-       }
-
        gen5_gt_irq_reset(to_gt(dev_priv));
-
-       ibx_display_irq_reset(display);
+       ilk_display_irq_reset(display);
 }
 
 static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
-- 
2.47.3