On Wed, 2025-10-15 at 12:52 +0530, Ankit Nautiyal wrote: > Introduce intel_dp_compute_config_late() to handle late-stage > configuration checks for DP/eDP features. For now, it paves path for > psr_compute_config_late() to handle psr parameters that need to be > computed late. > > Move the handling of psr_flag for Wa_18037818876 and setting of non- > psr > pipes to intel_psr_compute_config_late() as these are the last things > to be configured for PSR features. > > Signed-off-by: Ankit Nautiyal <[email protected]>
Reviewed-by: Jouni Högander <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 3 +++ > drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++++ > drivers/gpu/drm/i915/display/intel_dp.h | 3 +++ > drivers/gpu/drm/i915/display/intel_psr.c | 24 +++++++++++++++------- > -- > drivers/gpu/drm/i915/display/intel_psr.h | 2 ++ > 5 files changed, 32 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index c09aa759f4d4..94c593bbedf4 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4560,6 +4560,9 @@ static int intel_ddi_compute_config_late(struct > intel_encoder *encoder, > struct drm_connector *connector = conn_state->connector; > u8 port_sync_transcoders = 0; > > + if (intel_crtc_has_dp_encoder(crtc_state)) > + intel_dp_compute_config_late(encoder, crtc_state, > conn_state); > + > drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n", > encoder->base.base.id, encoder->base.name, > crtc_state->uapi.crtc->base.id, crtc_state- > >uapi.crtc->name); > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index a723e846321f..e481ff4c4959 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -6979,3 +6979,12 @@ void intel_dp_mst_resume(struct intel_display > *display) > } > } > } > + > +void intel_dp_compute_config_late(struct intel_encoder *encoder, > + struct intel_crtc_state > *crtc_state, > + struct drm_connector_state > *conn_state) > +{ > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > + > + intel_psr_compute_config_late(intel_dp, crtc_state); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > b/drivers/gpu/drm/i915/display/intel_dp.h > index b379443e0211..0d9573ca44cb 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct > intel_crtc_state *crtc_state, > int intel_dp_dsc_bpp_step_x16(const struct intel_connector > *connector); > void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool > force_on_external); > bool intel_dp_in_hdr_mode(const struct drm_connector_state > *conn_state); > +void intel_dp_compute_config_late(struct intel_encoder *encoder, > + struct intel_crtc_state > *crtc_state, > + struct drm_connector_state > *conn_state); > > #endif /* __INTEL_DP_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index e97dcfa7673c..383e6dc1ed63 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1785,15 +1785,6 @@ void intel_psr_compute_config(struct intel_dp > *intel_dp, > return; > > crtc_state->has_sel_update = > intel_sel_update_config_valid(intel_dp, crtc_state); > - > - /* Wa_18037818876 */ > - if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) { > - crtc_state->has_psr = false; > - drm_dbg_kms(display->drm, > - "PSR disabled to workaround PSR FSM hang > issue\n"); > - } > - > - intel_psr_set_non_psr_pipes(intel_dp, crtc_state); > } > > void intel_psr_get_config(struct intel_encoder *encoder, > @@ -4355,3 +4346,18 @@ bool intel_psr_needs_alpm_aux_less(struct > intel_dp *intel_dp, > { > return intel_dp_is_edp(intel_dp) && crtc_state- > >has_panel_replay; > } > + > +void intel_psr_compute_config_late(struct intel_dp *intel_dp, > + struct intel_crtc_state > *crtc_state) > +{ > + struct intel_display *display = to_intel_display(intel_dp); > + > + /* Wa_18037818876 */ > + if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) { > + crtc_state->has_psr = false; > + drm_dbg_kms(display->drm, > + "PSR disabled to workaround PSR FSM hang > issue\n"); > + } > + > + intel_psr_set_non_psr_pipes(intel_dp, crtc_state); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_psr.h > b/drivers/gpu/drm/i915/display/intel_psr.h > index 9147996d6c9e..b17ce312dc37 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.h > +++ b/drivers/gpu/drm/i915/display/intel_psr.h > @@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct > intel_display *display); > bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct > intel_crtc_state *crtc_state); > bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp, > const struct intel_crtc_state > *crtc_state); > +void intel_psr_compute_config_late(struct intel_dp *intel_dp, > + struct intel_crtc_state > *crtc_state); > > #endif /* __INTEL_PSR_H__ */
