From: Ville Syrjälä <[email protected]>

Add intel_calc_enabled_pipes() as the counterpart to
intel_calc_active_pipes(). We have some uses where the set
of logically enabled pipes makes more sense than the set of
active pipes.

Signed-off-by: Ville Syrjälä <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_display.h |  2 ++
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 747283c4cefd..42fb0e082cc9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5633,6 +5633,23 @@ static int hsw_mode_set_planes_workaround(struct 
intel_atomic_state *state)
        return 0;
 }
 
+u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
+                           u8 enabled_pipes)
+{
+       const struct intel_crtc_state *crtc_state;
+       struct intel_crtc *crtc;
+       int i;
+
+       for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
+               if (crtc_state->hw.enable)
+                       enabled_pipes |= BIT(crtc->pipe);
+               else
+                       enabled_pipes &= ~BIT(crtc->pipe);
+       }
+
+       return enabled_pipes;
+}
+
 u8 intel_calc_active_pipes(struct intel_atomic_state *state,
                           u8 active_pipes)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index 9a9a44b61f7f..fc2ef92ccf68 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -394,6 +394,8 @@ enum phy_fia {
                                       i)
 
 int intel_atomic_check(struct drm_device *dev, struct drm_atomic_state *state);
+u8 intel_calc_enabled_pipes(struct intel_atomic_state *state,
+                           u8 enabled_pipes);
 u8 intel_calc_active_pipes(struct intel_atomic_state *state,
                           u8 active_pipes);
 void intel_link_compute_m_n(u16 bpp, int nlanes,
-- 
2.49.1

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