Enable DC Balance from vrr compute config and related hw flag. --v2: - Use dc balance check instead of source restriction.
Signed-off-by: Mitul Golani <[email protected]> --- drivers/gpu/drm/i915/display/intel_vrr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 74a6d5243f00..87945b031a7d 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -266,12 +266,17 @@ static void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state, int vmin, int vmax) { + struct intel_display *display = to_intel_display(crtc_state); + crtc_state->vrr.vmax = vmax; crtc_state->vrr.vmin = vmin; crtc_state->vrr.flipline = crtc_state->vrr.vmin; crtc_state->vrr.enable = true; crtc_state->mode_flags |= I915_MODE_FLAG_VRR; + + if (HAS_VRR_DC_BALANCE(display)) + crtc_state->vrr.dc_balance.enable = true; } static @@ -892,6 +897,10 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state, vrr_ctl |= VRR_CTL_CMRR_ENABLE; intel_vrr_enable_dc_balancing(crtc_state); + + if (crtc_state->vrr.dc_balance.enable) + vrr_ctl |= VRR_CTL_DCB_ADJ_ENABLE; + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl); } -- 2.48.1
