Enable casf by writing the register SKL_PS_WIN_SZ as it is an arming register. It has to be invoked from both dsb and non-dsb path.
Signed-off-by: Nemesa Garg <[email protected]> --- drivers/gpu/drm/i915/display/intel_casf.c | 27 +++++++++++++++----- drivers/gpu/drm/i915/display/intel_casf.h | 3 +++ drivers/gpu/drm/i915/display/intel_display.c | 6 +++++ 3 files changed, 30 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c index e9ffbd42a030..6b99eca6f031 100644 --- a/drivers/gpu/drm/i915/display/intel_casf.c +++ b/drivers/gpu/drm/i915/display/intel_casf.c @@ -81,14 +81,9 @@ void intel_casf_update_strength(struct intel_dsb *dsb, { struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - int win_size; intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK, FILTER_STRENGTH(crtc_state->hw.casf_params.strength)); - - win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1)); - - intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size); } static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state) @@ -280,6 +275,27 @@ void intel_casf_enable(struct intel_dsb *dsb, skl_scaler_setup_casf(crtc_state); } +void intel_casf_arm(struct intel_dsb *dsb, + const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + const struct drm_display_mode *adjusted_mode = + &crtc_state->hw.adjusted_mode; + const struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + enum pipe pipe = crtc->pipe; + + int id, width, height; + + width = adjusted_mode->crtc_hdisplay; + height = adjusted_mode->crtc_vdisplay; + id = scaler_state->scaler_id; + + intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id), + PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height)); +} + void intel_casf_disable(struct intel_dsb *dsb, const struct intel_crtc_state *crtc_state) { @@ -289,7 +305,6 @@ void intel_casf_disable(struct intel_dsb *dsb, intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, 1), 0); intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, 1), 0); intel_de_write_dsb(display, dsb, SHARPNESS_CTL(crtc->pipe), 0); - intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, 1), 0); } void intel_casf_check(struct intel_atomic_state *state) diff --git a/drivers/gpu/drm/i915/display/intel_casf.h b/drivers/gpu/drm/i915/display/intel_casf.h index 16a938e19c71..816fc285a921 100644 --- a/drivers/gpu/drm/i915/display/intel_casf.h +++ b/drivers/gpu/drm/i915/display/intel_casf.h @@ -24,5 +24,8 @@ void intel_casf_disable(struct intel_dsb *dsb, void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state); bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state); void intel_casf_check(struct intel_atomic_state *state); +void intel_casf_arm(struct intel_dsb *dsb, + const struct intel_crtc_state *crtc_state); + #endif /* __INTEL_CASF_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 7edfc8c2ae21..52d1eff4de2e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6722,6 +6722,9 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state, drm_WARN_ON(display->drm, new_crtc_state->use_dsb || new_crtc_state->use_flipq); + if (new_crtc_state->hw.casf_params.casf_enable) + intel_casf_arm(new_crtc_state->dsb_commit, + new_crtc_state); /* * Disable the scaler(s) after the plane(s) so that we don't * get a catastrophic underrun even if the two operations @@ -7364,6 +7367,9 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, if (intel_crtc_needs_color_update(new_crtc_state)) intel_color_commit_arm(new_crtc_state->dsb_commit, new_crtc_state); + if (new_crtc_state->hw.casf_params.casf_enable) + intel_casf_arm(new_crtc_state->dsb_commit, + new_crtc_state); bdw_set_pipe_misc(new_crtc_state->dsb_commit, new_crtc_state); intel_psr2_program_trans_man_trk_ctl(new_crtc_state->dsb_commit, -- 2.25.1
