This makes the irq handler safe on PREEMPT-RT too.
This is similar to the i915 commit 8cadce97bf26 ("drm/i915/gsc: mei
interrupt top half should be in irq disabled context").

Fixes: 87a4c85d3a3e ("drm/xe/gsc: add gsc device support")
Cc: <[email protected]> # v6.8+
Signed-off-by: Maarten Lankhorst <[email protected]>
---
 drivers/gpu/drm/xe/xe_heci_gsc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_heci_gsc.c b/drivers/gpu/drm/xe/xe_heci_gsc.c
index 2b3d49dd394c0..495cdd4f948d5 100644
--- a/drivers/gpu/drm/xe/xe_heci_gsc.c
+++ b/drivers/gpu/drm/xe/xe_heci_gsc.c
@@ -223,7 +223,7 @@ void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir)
        if (xe->heci_gsc.irq < 0)
                return;
 
-       ret = generic_handle_irq(xe->heci_gsc.irq);
+       ret = generic_handle_irq_safe(xe->heci_gsc.irq);
        if (ret)
                drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", 
ret);
 }
@@ -243,7 +243,7 @@ void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir)
        if (xe->heci_gsc.irq < 0)
                return;
 
-       ret = generic_handle_irq(xe->heci_gsc.irq);
+       ret = generic_handle_irq_safe(xe->heci_gsc.irq);
        if (ret)
                drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", 
ret);
 }
-- 
2.51.0

Reply via email to