[PATCH] drm/i915/display: Disable DMG Clock Gating

[Suraj Kandpal]

Disable DMG Clock gating during display initialization.

WA: 22021451799
Bspec: 69095
Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_modeset_setup.c | 7 +++++++
 drivers/gpu/drm/i915/i915_reg.h                    | 1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c 
b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index d10cbf69a5f8..2d46f00bd0d8 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -910,6 +910,13 @@ get_encoder_power_domains(struct intel_display *display)
 
 static void intel_early_display_was(struct intel_display *display)
 {
+       /*
+        * Wa_22021451799
+        * Disable DMG Clock gating
+        */
+       if (DISPLAY_VER(display) == 35)
+               intel_de_rmw(display, GEN9_CLKGATE_DIS_0, 0, DMG_GATING_DIS);
+
        /*
         * Display WA #1185 WaDisableDARBFClkGating:glk,icl,ehl,tgl
         * Also known as Wa_14010480278.
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5bf3b4ab2baa..f928db78a3fa 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -763,6 +763,7 @@
  */
 #define GEN9_CLKGATE_DIS_0             _MMIO(0x46530)
 #define   DARBF_GATING_DIS             REG_BIT(27)
+#define   DMG_GATING_DIS               REG_BIT(21)
 #define   MTL_PIPEDMC_GATING_DIS(pipe) REG_BIT(15 - (pipe))
 #define   PWM2_GATING_DIS              REG_BIT(14)
 #define   PWM1_GATING_DIS              REG_BIT(13)
-- 
2.34.1