From: Dibin Moolakadan Subrahmanian <[email protected]>

Add intel_cmtg_disable() to disable CMTG when the transcoder is disabled.

Signed-off-by: Dibin Moolakadan Subrahmanian 
<[email protected]>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c     | 33 +++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_cmtg.h     |  1 +
 .../gpu/drm/i915/display/intel_cmtg_regs.h    |  1 +
 drivers/gpu/drm/i915/display/intel_crt.c      |  1 +
 drivers/gpu/drm/i915/display/intel_display.c  |  1 +
 5 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c 
b/drivers/gpu/drm/i915/display/intel_cmtg.c
index d1ec9b79cef2..844e01b6fc9f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -18,6 +18,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_vrr.h"
+#include "intel_vrr_regs.h"
 
 /**
  * DOC: Common Primary Timing Generator (CMTG)
@@ -126,8 +127,8 @@ static bool intel_cmtg_disable_requires_modeset(struct 
intel_display *display,
        return cmtg_config->trans_a_secondary || cmtg_config->trans_b_secondary;
 }
 
-static void intel_cmtg_disable(struct intel_display *display,
-                              struct intel_cmtg_config *cmtg_config)
+static void intel_cmtg_disable_all(struct intel_display *display,
+                                  struct intel_cmtg_config *cmtg_config)
 {
        u32 clk_sel_clr = 0;
        u32 clk_sel_set = 0;
@@ -158,6 +159,32 @@ static void intel_cmtg_disable(struct intel_display 
*display,
                intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr, clk_sel_set);
 }
 
+void intel_cmtg_disable(const struct intel_crtc_state *crtc_state)
+{
+       struct intel_display *display = to_intel_display(crtc_state);
+       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+       u32 val;
+
+       if (cpu_transcoder != TRANSCODER_A && cpu_transcoder != TRANSCODER_B)
+               return;
+
+       val = intel_de_read(display, TRANS_VRR_CTL_CMTG(cpu_transcoder));
+       val &= ~VRR_CTL_VRR_ENABLE;
+       val &= ~VRR_CTL_FLIP_LINE_EN;
+       intel_de_write(display, TRANS_VRR_CTL_CMTG(cpu_transcoder), val);
+
+       intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, cpu_transcoder),
+                    PORT_SYNC_MODE_ENABLE, 0);
+
+       intel_de_rmw(display, TRANS_CMTG_CTL(cpu_transcoder), CMTG_ENABLE, 0);
+
+       if (intel_de_wait_for_clear_ms(display, TRANS_CMTG_CTL(cpu_transcoder), 
CMTG_STATE, 50)) {
+               drm_WARN(display->drm, 1, "CMTG:%d disable timeout\n", 
cpu_transcoder);
+               return;
+       }
+
+       drm_dbg_kms(display->drm, "CMTG:%d disabled\n", cpu_transcoder);
+}
 /*
  * Read out CMTG configuration and, on platforms that allow disabling it 
without
  * a modeset, do it.
@@ -185,7 +212,7 @@ void intel_cmtg_sanitize(struct intel_display *display)
        if (intel_cmtg_disable_requires_modeset(display, &cmtg_config))
                return;
 
-       intel_cmtg_disable(display, &cmtg_config);
+       intel_cmtg_disable_all(display, &cmtg_config);
 }
 
 void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.h 
b/drivers/gpu/drm/i915/display/intel_cmtg.h
index b2bb60d160fa..4f70577be136 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.h
@@ -10,6 +10,7 @@ struct intel_display;
 struct intel_crtc_state;
 
 void intel_cmtg_enable(const struct intel_crtc_state *crtc_state);
+void intel_cmtg_disable(const struct intel_crtc_state *crtc_state);
 void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state);
 void intel_cmtg_sanitize(struct intel_display *display);
 
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h 
b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 0ed767a797c0..f11d5514c376 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -21,6 +21,7 @@
 #define TRANS_CMTG_CTL(id)             _MMIO(0x6fa88 + (id) * 0x100)
 #define  CMTG_ENABLE                   REG_BIT(31)
 #define  CMTG_SYNC_TO_PORT             REG_BIT(29)
+#define  CMTG_STATE                    REG_BIT(23)
 
 #define TRANS_HTOTAL_CMTG(id)          _MMIO(0x6F000 + (id) * 0x100)
 #define TRANS_HBLANK_CMTG(id)          _MMIO(0x6F004 + (id) * 0x100)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c 
b/drivers/gpu/drm/i915/display/intel_crt.c
index b71a8d97cdbb..37a6a139f67b 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -35,6 +35,7 @@
 #include <drm/drm_probe_helper.h>
 #include <video/vga.h>
 
+#include "intel_cmtg.h"
 #include "intel_connector.h"
 #include "intel_crt.h"
 #include "intel_crt_regs.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 976af9eb3c3a..622f9b690342 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1773,6 +1773,7 @@ static void hsw_crtc_disable(struct intel_atomic_state 
*state,
        struct intel_crtc *pipe_crtc;
        int i;
 
+       intel_cmtg_disable(old_crtc_state);
        /*
         * FIXME collapse everything to one hook.
         * Need care with mst->ddi interactions.
-- 
2.29.0

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