We need to do some configurations on DSC when using PSR2/PR Selective Update Early Transport. Convert intel_dsc_get_vdsc_per_pipe as non-static to make it available for PSR code.
Signed-off-by: Jouni Högander <[email protected]> --- drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +- drivers/gpu/drm/i915/display/intel_vdsc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 7e53201b3cb1..f27ec0251613 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -467,7 +467,7 @@ intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder) return POWER_DOMAIN_TRANSCODER_VDSC_PW2; } -static int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state) +int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state) { return crtc_state->dsc.slice_config.streams_per_pipe; } diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h index f4d5b37293cf..b70ac86ca9ab 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h @@ -44,5 +44,6 @@ unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state) int intel_dsc_get_pixel_rate_with_dsc_bubbles(struct intel_display *display, int pixel_rate, int htotal, int dsc_horizontal_slices); +int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VDSC_H__ */ -- 2.43.0
