Hardware provides mechanism to skip AS SDP for programmed number of frames. Enable the same to drive to 1Hz if hardware supports it.
Signed-off-by: Uma Shankar <[email protected]> --- drivers/gpu/drm/i915/display/intel_alpm.c | 3 +++ drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index b3334bc4d0f9..76a8919cdba2 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -395,6 +395,9 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, if (crtc_state->disable_as_sdp_when_pr_active) pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE; + if (DISPLAY_VER(display) >= 35) + pr_alpm_ctl |= PR_ALPM_CTL_ASSDP_SKIP_FRAMES(32); + intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder), pr_alpm_ctl); } diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h index 8afbf5a38335..8c35df795955 100644 --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h @@ -268,6 +268,8 @@ #define _PR_ALPM_CTL_A 0x60948 #define PR_ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PR_ALPM_CTL_A) +#define PR_ALPM_CTL_ASSDP_SKIP_FRAMES_MASK REG_GENMASK(27, 16) +#define PR_ALPM_CTL_ASSDP_SKIP_FRAMES(val) REG_FIELD_PREP(PR_ALPM_CTL_ASSDP_SKIP_FRAMES_MASK, val) #define PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU BIT(6) #define PR_ALPM_CTL_RFB_UPDATE_CONTROL BIT(5) #define PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE BIT(4) -- 2.50.1
