On Tue, Mar 10, 2026 at 02:00:47PM +0530, Dibin Moolakadan Subrahmanian wrote: > >From display version 35 onwards PIPEDMC_ATS_FAULT and > PIPEDMC_GTT_FAULT interrupt bits are no longer defined. > > Update the interrupt mask to drop these and > enable the PIPEDMC_ERROR interrupt.
That's two different things in one patch. Please split properly. > > Signed-off-by: Dibin Moolakadan Subrahmanian > <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c > b/drivers/gpu/drm/i915/display/intel_dmc.c > index c3b411259a0c..e60f1f977070 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > @@ -509,6 +509,10 @@ static void pipedmc_clock_gating_wa(struct intel_display > *display, bool enable) > > static u32 pipedmc_interrupt_mask(struct intel_display *display) > { > + if (DISPLAY_VER(display) >= 35) > + return PIPEDMC_FLIPQ_PROG_DONE | > + PIPEDMC_ERROR; > + > /* > * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B > * triggering it during the first DC state transition. Figure > -- > 2.43.0 -- Ville Syrjälä Intel
