On 01-06-2026 11:20, Manna, Animesh wrote:
-----Original Message-----
From: Dibin Moolakadan Subrahmanian
<[email protected]>
Sent: Wednesday, May 27, 2026 12:48 AM
To: [email protected]; [email protected]
Cc: Manna, Animesh <[email protected]>; Shankar, Uma
<[email protected]>
Subject: [PATCH v4 13/13] drm/i915/display: Add DC3CO count and residency
in dmc debugfs
Expose DC3CO count and residency for xe3lp platforms via debugfs.
Changes in v4:
- Keep dc5_reg register initialization to avoid any
invalid access (sashiko)
Signed-off-by: Dibin Moolakadan Subrahmanian
<[email protected]>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 9 ++++++++-
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 2 ++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index a133785c815b..5ffe2b1c3c51 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1650,7 +1650,14 @@ static int intel_dmc_debugfs_status_show(struct
seq_file *m, void *unused)
DMC_VERSION_MINOR(dmc->version));
if (DISPLAY_VER(display) >= 12) {
- if (display->platform.dgfx || DISPLAY_VER(display) >= 14) {
+ if (DISPLAY_VER(display) >= 35) {
+ dc5_reg = DG1_DMC_DEBUG_DC5_COUNT;
+ seq_printf(m, "DC3CO count: %d\n",
+ intel_de_read(display,
XE3P_DMC_DC3CO_COUNT));
+
+ seq_printf(m, "DC3CO residency: %d\n",
+ intel_de_read(display,
DC_STATE_DC3CO_RESIDENCY));
+ } else if (display->platform.dgfx || DISPLAY_VER(display) >=
14) {
dc5_reg = DG1_DMC_DEBUG_DC5_COUNT;
} else {
dc5_reg = TGL_DMC_DEBUG_DC5_COUNT;
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index 38e342b45af0..1998549b6318 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -531,6 +531,8 @@ enum pipedmc_event_id {
#define TGL_DMC_DEBUG3 _MMIO(0x101090)
#define DG1_DMC_DEBUG3 _MMIO(0x13415c)
+#define XE3P_DMC_DC3CO_COUNT _MMIO(0x8f05C)
Lower and upper-case mixing.
Will change it to lower case in the next version.
Regards,
Animesh
+
#define DMC_WAKELOCK_CFG _MMIO(0x8F1B0)
#define DMC_WAKELOCK_CFG_ENABLE REG_BIT(31)
#define DMC_WAKELOCK1_CTL _MMIO(0x8F140)
--
2.43.0
