Quoting Jia Yao (2026-06-09 21:30:02)
> Wa_22013059131 sets FORCE_1_SUB_MESSAGE_PER_FRAGMENT in LSC_CHICKEN_BIT_0
> at engine init, but this is known to cause GPU hangs in certain workloads.
> Add I915_CONTEXT_PARAM_WA_22013059131 so userspace that handles the
> workaround itself (e.g. by limiting SLM size) can set it to 1 to let the
> kernel know bit 15 programming is not needed for that context.
>
> LSC_CHICKEN_BIT_0 is not context-saved by hardware, so the kernel restores
> the correct value on every context switch via the indirect context
> batchbuffer to avoid leaking state between contexts. The old unconditional
> application of Wa22013059131 in intel_workarounds.c is removed.
>
> v4:
> - Add a link of the userspace using this API
>
> v3:
> - Kernel-internal context will not change workaround settings
>
> Bspec: 54833
> Fixes: 645cc0b9d972 ("drm/i915/dg2: Add initial gt/ctx/engine workarounds")
This is not a fixup to be backported to older kernels, this is a new
feature, so please drop this. It'll cause unnecessary noise.
> Link: https://github.com/intel/compute-runtime/pull/919
> Cc: [email protected]
Definitely not for stable for above reasons.
Regards, Joonas
