> -----Original Message-----
> From: Nautiyal, Ankit K <[email protected]>
> Sent: Friday, June 12, 2026 9:18 AM
> To: [email protected]; [email protected]
> Cc: Hogander, Jouni <[email protected]>; Manna, Animesh
> <[email protected]>; Nautiyal, Ankit K
> <[email protected]>
> Subject: [PATCH] drm/i915/alpm: Move the check for PSR and Fixed RR in
> compute_config_late
>
> With optimized guardband, we need to take into account LOBF requirements
> via intel_alpm_lobf_min_guardband().
>
> Currently, we set has_lobf based not only on whether it is supported, but
> also on whether PSR/fixed RR are ON. Since these features can switch ON and
> OFF seamlessly, this may cause LOBF to change, resulting in a change in
> guardband requirements, and eventually to a full modeset.
>
> To avoid this, always account for LOBF if it is supported, in the
> encoder->compute_config() stage. For this, allow has_lobf to be set
> irrespective of PSR/Fixed RR. Later, in the encoder->compute_config_late()
> stage, use the PSR/Fixed RR checks to set has_lobf to the final value.
>
> Move the PSR/Fixed RR checks from intel_alpm_lobf_compute_config() to
> intel_alpm_lobf_compute_config_late(), where we already account for other
> LOBF constraints.
>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index c6963ea420cc..b7cab744d0ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -291,6 +291,12 @@ void intel_alpm_lobf_compute_config_late(struct
> intel_dp *intel_dp,
> if (!crtc_state->has_lobf)
> return;
>
> + if (crtc_state->has_psr)
> + return;
If has_psr is true we need to reset has_lobf otherwise both flags will be true.
> +
> + if (!intel_vrr_is_fixed_rr(crtc_state))
> + return;
Same for fixed_rr.
> +
> if (!intel_alpm_lobf_is_window1_sufficient(crtc_state)) {
> crtc_state->has_lobf = false;
> return;
> @@ -343,11 +349,7 @@ void intel_alpm_lobf_compute_config(struct
> intel_dp *intel_dp,
> if (!intel_dp->as_sdp_supported)
> return;
>
> - if (crtc_state->has_psr)
> - return;
> -
> - if (!intel_vrr_always_use_vrr_tg(display) ||
> - !intel_vrr_is_fixed_rr(crtc_state))
> + if (!intel_vrr_always_use_vrr_tg(display))
> return;
>
> if (!(intel_alpm_aux_wake_supported(intel_dp) ||
> --
> 2.45.2
