> -----Original Message-----
> From: Nautiyal, Ankit K <[email protected]>
> Sent: Tuesday, June 16, 2026 1:36 PM
> To: [email protected]; [email protected]
> Cc: Hogander, Jouni <[email protected]>; Manna, Animesh
> <[email protected]>; Nautiyal, Ankit K
> <[email protected]>
> Subject: [PATCH v2] drm/i915/alpm: Move the check for PSR and Fixed RR in
> compute_config_late
> 
> With optimized guardband, we need to take into account LOBF requirements
> via intel_alpm_lobf_min_guardband().
> 
> Currently, we set has_lobf based not only on whether it is supported, but
> also on whether PSR/fixed RR are ON. Since these features can switch ON and
> OFF seamlessly, this may cause LOBF to change, resulting in a change in
> guardband requirements, and eventually to a full modeset.
> 
> To avoid this, always account for LOBF if it is supported, in the
> encoder->compute_config() stage. For this, allow has_lobf to be set
> irrespective of PSR/Fixed RR. Later, in the encoder->compute_config_late()
> stage, use the PSR/Fixed RR checks to set has_lobf to the final value.
> 
> Move the PSR/Fixed RR checks from intel_alpm_lobf_compute_config() to
> intel_alpm_lobf_compute_config_late(), where we already account for other
> LOBF constraints.
> 
> v2: Reset has_lobf if psr or VRR is ON in
>     intel_alpm_lobf_compute_config_late(). (Animesh)
> 
> Signed-off-by: Ankit Nautiyal <[email protected]>

LGTM.
Reviewed-by: Animesh Manna <[email protected]>

> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index c6963ea420cc..991de6e2456c 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -291,7 +291,9 @@ void intel_alpm_lobf_compute_config_late(struct
> intel_dp *intel_dp,
>       if (!crtc_state->has_lobf)
>               return;
> 
> -     if (!intel_alpm_lobf_is_window1_sufficient(crtc_state)) {
> +     if (crtc_state->has_psr ||
> +         !intel_vrr_is_fixed_rr(crtc_state) ||
> +         !intel_alpm_lobf_is_window1_sufficient(crtc_state)) {
>               crtc_state->has_lobf = false;
>               return;
>       }
> @@ -343,11 +345,7 @@ void intel_alpm_lobf_compute_config(struct
> intel_dp *intel_dp,
>       if (!intel_dp->as_sdp_supported)
>               return;
> 
> -     if (crtc_state->has_psr)
> -             return;
> -
> -     if (!intel_vrr_always_use_vrr_tg(display) ||
> -         !intel_vrr_is_fixed_rr(crtc_state))
> +     if (!intel_vrr_always_use_vrr_tg(display))
>               return;
> 
>       if (!(intel_alpm_aux_wake_supported(intel_dp) ||
> --
> 2.34.1

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