> -----Original Message----- > From: Manna, Animesh <[email protected]> > Sent: Tuesday, June 16, 2026 1:33 AM > To: [email protected]; [email protected] > Cc: Shankar, Uma <[email protected]>; Dibin Moolakadan > Subrahmanian <[email protected]>; > [email protected]; Nikula, Jani <[email protected]>; Manna, > Animesh <[email protected]> > Subject: [PATCH v9 00/22] CMTG enablement > > Common mode timing generator (CMTG) support is added NVL onwards. > Enable CMTG which will be needed by other fearure like dynamic dc state > enablement later. > > Testing ongoing, currently counters are incrementing as expected. > > Animesh Manna (19): > drm/i915/cmtg: Add intel_cmtg_is_allowed() for CMTG > drm/i915/cmtg: Set CMTG clock select > drm/i915/cmtg: Add CMTG transcoder offset in struct _device_info > drm/i915/display: Pass target transcoder to > intel_set_transcoder_timings() > drm/i915/display: Rename cpu_transcoder parameter to transcoder > drm/i915/display: Skip DP_MIN_HBLANK_CTL programming for CMTG > transcoders > drm/i915/display: Pass transcoder to > intel_set_transcoder_timings_lrr() > drm/i915/display: Rename cpu_transcoder parameter to transcoder in LRR > path > drm/i915/cmtg: Set timings for CMTG by using transcoder timing helpers > drm/i915/vrr: Pass transcoder to intel_vrr_set_fixed_rr_timings() > drm/i915/display: Rename cpu_transcoder parameter to transcoder in VRR > fixed-rr path > drm/i915/cmtg: Program VRR fixed-rate timings for CMTG transcoder > drm/i915/cmtg: Program VRR control register for CMTG transcoder > drm/i915/cmtg: Set link M/N for CMTG transcoder > drm/i915/cmtg: Add hook to enable CMTG with sync to port > drm/i915/cmtg: Add a hook to make eDP transcoder secondary > drm/i915/cmtg: Add trigger to enable/disable cmtg > drm/i915/cmtg: Restore CMTG after DC6 exit > drm/i915/cmtg: Add CMTG interrupt handling > > Dibin Moolakadan Subrahmanian (3): > drm/i915/cmtg: Modify existing hook to disable CMTG > drm/i915/cmtg: Add CMTG HWGB programming > drm/i915/cmtg: Add CMTG scan line programming
The patches are pushed to din. Thank you Uma, Ville, Jani, and Dibin, for all your feedback and reviews. Regards, Animesh > > drivers/gpu/drm/i915/display/intel_cmtg.c | 277 +++++++++++++++++- > drivers/gpu/drm/i915/display/intel_cmtg.h | 17 ++ > .../gpu/drm/i915/display/intel_cmtg_regs.h | 24 +- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 11 + > drivers/gpu/drm/i915/display/intel_display.c | 84 ++++-- > drivers/gpu/drm/i915/display/intel_display.h | 4 + > .../drm/i915/display/intel_display_device.c | 14 + > .../drm/i915/display/intel_display_device.h | 2 +- > .../gpu/drm/i915/display/intel_display_irq.c | 19 ++ > .../gpu/drm/i915/display/intel_display_irq.h | 2 + > .../drm/i915/display/intel_display_limits.h | 2 + > .../drm/i915/display/intel_display_power.c | 23 ++ > .../drm/i915/display/intel_display_power.h | 2 + > .../gpu/drm/i915/display/intel_display_regs.h | 2 + > .../drm/i915/display/intel_display_types.h | 4 + > drivers/gpu/drm/i915/display/intel_vrr.c | 19 +- > drivers/gpu/drm/i915/display/intel_vrr.h | 4 +- > 17 files changed, 460 insertions(+), 50 deletions(-) > > -- > 2.29.0
