The existing CMRR fractional-timing code was permanently
disabled (if (!HAS_CMRR || true)), eDP-only, and relied
on a heuristic to guess when the fractional path was needed.
This series reworks it into a generic, debugfs-driven feature,
which later will be controlled via userspace when respective
uapi will be in-palce.
Mitul Golani (11):
drm/i915/vrr: add per-CRTC vrr/cmrr debugfs control
drm/i915/vrr: compute CMRR fractional timings generically
drm/i915/vrr: dump CMRR state in the crtc state dump
drm/i915/vrr: Move CMRR hw registers to fix refresh rate path
drm/i915/vrr: Enable/Disable CMRR based on enable/disable
preconditions
drm/i915/display: Move CMRR crtc_state members under VRR
drm/i915/vrr: Fix the CMRR enabling/disabling sequence
drm/i915/vrr: Compare state and HW registers if platform supports CMRR
drm/i915/vrr: Remove TODO as CMRR is exclusive to Adaptive mode
drm/i915/vrr: Return from CMRR compute config in case of PSR2 enabled
drm/i915/vrr: Enable cmrr
.../drm/i915/display/intel_crtc_state_dump.c | 4 +
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
.../drm/i915/display/intel_display_debugfs.c | 2 +
.../drm/i915/display/intel_display_types.h | 12 +
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 360 +++++++++++++-----
drivers/gpu/drm/i915/display/intel_vrr.h | 2 +
7 files changed, 293 insertions(+), 93 deletions(-)
--
2.48.1
