> -----Original Message-----
> From: Dibin Moolakadan Subrahmanian
> <[email protected]>
> Sent: Tuesday, June 16, 2026 9:52 PM
> To: [email protected]; [email protected]
> Cc: Shankar, Uma <[email protected]>; Manna, Animesh
> <[email protected]>; [email protected]
> Subject: [PATCH v6 04/16] drm/i915/display: Add DC3CO DC_STATE
> enable/disable support
>
> Add DC3CO handling to the dc_off power well sequencing and disable the
> DMC wakelock when exiting DC3CO.
>
> Changes in v5:
> - Call assert_can_enable_dc3co() before dc3co enable (Manna Animesh)
>
> BSpec: 75253
> Signed-off-by: Dibin Moolakadan Subrahmanian
> <[email protected]>
> Reviewed-by: Uma Shankar <[email protected]>
Reviewed-by: Animesh Manna <[email protected]>
> ---
> .../i915/display/intel_display_power_well.c | 27 ++++++++++++++++++-
> 1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 71ea2ecc8c88..9c8ea14a5cff 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -866,6 +866,24 @@ void gen9_set_dc_state(struct intel_display *display,
> u32 state)
> power_domains->dc_state = val & mask;
> }
>
> +static void assert_can_enable_dc3co(struct intel_display *display) {
> + drm_WARN_ONCE(display->drm,
> + (intel_de_read(display, DC_STATE_EN) &
> + DC_STATE_EN_UPTO_DC3CO),
> + "DC3CO already programmed to be enabled.\n");
> +
> + assert_main_dmc_loaded(display);
> +}
> +
> +static void xe3lpd_enable_dc3co(struct intel_display *display) {
> + assert_can_enable_dc3co(display);
> + drm_dbg_kms(display->drm, "Enabling DC3CO\n");
> + intel_dmc_wl_enable(display, DC_STATE_EN_UPTO_DC3CO);
> + gen9_set_dc_state(display, DC_STATE_EN_UPTO_DC3CO); }
> +
> static void assert_can_enable_dc5(struct intel_display *display) {
> enum i915_power_well_id high_pg;
> @@ -1054,9 +1072,13 @@ void gen9_disable_dc_states(struct intel_display
> *display)
> }
>
> if (old_state == DC_STATE_EN_UPTO_DC5 ||
> - old_state == DC_STATE_EN_UPTO_DC6)
> + old_state == DC_STATE_EN_UPTO_DC6 ||
> + old_state == DC_STATE_EN_UPTO_DC3CO)
> intel_dmc_wl_disable(display);
>
> + if (old_state == DC_STATE_EN_UPTO_DC3CO)
> + return;
> +
> intel_cdclk_get_cdclk(display, &cdclk_config);
> /* Can't read out voltage_level so can't use intel_cdclk_changed() */
> drm_WARN_ON(display->drm,
> @@ -1092,6 +1114,9 @@ static void gen9_dc_off_power_well_disable(struct
> intel_display *display,
> return;
>
> switch (power_domains->target_dc_state) {
> + case DC_STATE_EN_UPTO_DC3CO:
> + xe3lpd_enable_dc3co(display);
> + break;
> case DC_STATE_EN_UPTO_DC6:
> skl_enable_dc6(display);
> break;
> --
> 2.43.0
