> -----Original Message-----
> From: Intel-gfx <[email protected]> On Behalf Of Imre
> Deak
> Sent: Wednesday, June 17, 2026 1:39 AM
> To: [email protected]; [email protected]
> Subject: [PATCH v2 25/28] drm/i915/dp_link_caps: Move max link limits to
> link_caps
>
> Now that all users access the max link limits via helpers, move tracking of
> these limits from struct intel_dp to the link_caps state.
>
> Signed-off-by: Imre Deak <[email protected]>
> ---
> .../drm/i915/display/intel_display_types.h | 4 ----
> .../gpu/drm/i915/display/intel_dp_link_caps.c | 21 ++++++++++++-------
> 2 files changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 19c66b3a81509..8f9c8309b33e6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1837,10 +1837,6 @@ struct intel_dp {
> struct {
> /* TODO: move the rest of link specific fields to here */
> bool active;
> - /* Max lane count for the current link */
> - int max_lane_count;
> - /* Max rate for the current link */
> - int max_rate;
> /*
> * Link parameters for which the MST topology was probed.
> * Tracking these ensures that the MST path resources are diff
> --git a/drivers/gpu/drm/i915/display/intel_dp_link_caps.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_caps.c
> index 9b7da5a64ee25..43427e7cf422a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_caps.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_caps.c
> @@ -46,6 +46,17 @@ struct intel_dp_link_caps {
> * disconnects.
> */
> struct intel_dp_link_config forced_params;
> +
> + /*
> + * User set maximum limits. These limits constrain the currently
> + * allowed set of configurations and are not adjusted when sink
> + * capabilities change.
> + *
> + * max_limits.rate/lane_count may come from different allowed
> + * configurations, i.e. the (max_limits.rate, max_limits.lane_count)
> + * tuple itself may not be an allowed configuration.
> + */
> + struct intel_dp_link_config max_limits;
> };
>
> /* Get length of common rates array potentially limited by max_rate. */ @@ -
> 154,10 +165,7 @@ static int intel_dp_link_config_lane_count(const struct
> intel_dp_link_config_ent static void set_max_link_limits_no_update(struct
> intel_dp_link_caps *link_caps,
> const struct intel_dp_link_config
> *max_link_limits) {
> - struct intel_dp *intel_dp = link_caps->dp;
> -
> - intel_dp->link.max_rate = max_link_limits->rate;
> - intel_dp->link.max_lane_count = max_link_limits->lane_count;
> + link_caps->max_limits = *max_link_limits;
> }
>
> static void reset_max_link_limits_no_update(struct intel_dp_link_caps
> *link_caps) @@ -194,10 +202,7 @@ static void
> reset_max_link_limits_no_update(struct intel_dp_link_caps *link_caps void
> intel_dp_link_caps_get_max_limits(struct intel_dp_link_caps *link_caps,
> struct intel_dp_link_config
> *max_link_limits) {
> - struct intel_dp *intel_dp = link_caps->dp;
> -
> - max_link_limits->rate = intel_dp->link.max_rate;
> - max_link_limits->lane_count = intel_dp->link.max_lane_count;
> + *max_link_limits = link_caps->max_limits;
> }
>
LGTM,
Reviewed-by: Nemesa Garg <[email protected]>
> /**
> --
> 2.49.1
