From: Ville Syrjälä <[email protected]> The GMBUS pin pair <-> GPIO mapping is purely a property of the PCH (on the platforms where GMBUS lives in the PCH). So rename gmbus_pins_skl[] to gmbus_pins_spt[] and apply it based on the presence of the correct PCH type.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/display/intel_gmbus.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c index f69b8841c5dd..dec0f66f756f 100644 --- a/drivers/gpu/drm/i915/display/intel_gmbus.c +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c @@ -98,7 +98,7 @@ static const struct gmbus_pin gmbus_pins_lpt_lp[] = { [GMBUS_PIN_DPB] = { "dpb", GPIO_4 }, }; -static const struct gmbus_pin gmbus_pins_skl[] = { +static const struct gmbus_pin gmbus_pins_spt[] = { [GMBUS_PIN_DPC] = { "dpc", GPIO_3 }, [GMBUS_PIN_DPB] = { "dpb", GPIO_4 }, [GMBUS_PIN_DPD] = { "dpd", GPIO_5 }, @@ -180,9 +180,9 @@ static const struct gmbus_pin *get_gmbus_pin(struct intel_display *display, } else if (display->platform.geminilake || display->platform.broxton) { pins = gmbus_pins_bxt; size = ARRAY_SIZE(gmbus_pins_bxt); - } else if (DISPLAY_VER(display) == 9) { - pins = gmbus_pins_skl; - size = ARRAY_SIZE(gmbus_pins_skl); + } else if (HAS_PCH_SPT(display)) { + pins = gmbus_pins_spt; + size = ARRAY_SIZE(gmbus_pins_spt); } else if (HAS_PCH_LPT_LP(display)) { pins = gmbus_pins_lpt_lp; size = ARRAY_SIZE(gmbus_pins_lpt_lp); -- 2.53.0
