> -----Original Message----- > From: Jani Nikula <[email protected]> > Sent: 02 July 2026 21:11 > To: Golani, Mitulkumar Ajitkumar <[email protected]>; > [email protected] > Cc: [email protected]; Nautiyal, Ankit K > <[email protected]>; [email protected]; Kandpal, Suraj > <[email protected]> > Subject: Re: [PATCH RESEND v2] drm/i915/display: Program TRANS_VTOTAL > from mode vtotal > > On Wed, 17 Jun 2026, Mitul Golani <[email protected]> > wrote: > > There are monitors being sensitive to MSA and end up blanking out when > > we override Vtotal, DP transcoder uses TRANS_VTOTAL to derive MSA > > VTotal. Avoid overriding crtc_vtotal to 1 on platform which supports > > VRR Timing generator and always program VTOTAL from mode timing in > > transcoder timing paths. > > Should this have had Fixes: tag? Does it require a backport? > > BR, > Jani.
Hi Jani, No. This change was made to align the driver with the updated VTOTAL programming requirements rather than to fix a regression introduced by a specific upstream commit. The regression we've recently observed during the GOP-to-driver handoff appears to be a separate issue introduced by this change and will need to be addressed with a follow-up fix. Regards, Mitul > > > > > --v2: > > - Remove write to crtc_state->hw.adjusted_mode.crtc_vtotal > > during intel_vrr_get_config. (Ankit) > > - Fix merge conflicts. > > > > Bspec: 70001 > > Cc: Ankit Nautiyal <[email protected]> > > Cc: Ville Syrjälä <[email protected]> > > Cc: Suraj Kandpal <[email protected]> > > Signed-off-by: Mitul Golani <[email protected]> > > Reviewed-by: Suraj Kandpal <[email protected]> > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 17 ----------------- > > drivers/gpu/drm/i915/display/intel_vrr.c | 10 ---------- > > 2 files changed, 27 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > > b/drivers/gpu/drm/i915/display/intel_display.c > > index e76aa6c8dab6..42eb4c5bc9b6 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -2737,15 +2737,6 @@ void intel_set_transcoder_timings(const struct > intel_crtc_state *crtc_state, > > HSYNC_START(adjusted_mode->crtc_hsync_start - 1) | > > HSYNC_END(adjusted_mode->crtc_hsync_end - 1)); > > > > - /* > > - * For platforms that always use VRR Timing Generator, the > VTOTAL.Vtotal > > - * bits are not required. Since the support for these bits is going to > > - * be deprecated in upcoming platforms, avoid writing these bits for > the > > - * platforms that do not use legacy Timing Generator. > > - */ > > - if (intel_vrr_always_use_vrr_tg(display)) > > - crtc_vtotal = 1; > > - > > intel_de_write(display, TRANS_VTOTAL(display, transcoder), > > VACTIVE(crtc_vdisplay - 1) | > > VTOTAL(crtc_vtotal - 1)); > > @@ -2834,14 +2825,6 @@ void intel_set_transcoder_timings_lrr(const > struct intel_crtc_state *crtc_state, > > intel_de_write(display, TRANS_VSYNC(display, transcoder), > > VSYNC_START(adjusted_mode->crtc_vsync_start - 1) | > > VSYNC_END(adjusted_mode->crtc_vsync_end - 1)); > > - /* > > - * For platforms that always use VRR Timing Generator, the > VTOTAL.Vtotal > > - * bits are not required. Since the support for these bits is going to > > - * be deprecated in upcoming platforms, avoid writing these bits for > the > > - * platforms that do not use legacy Timing Generator. > > - */ > > - if (intel_vrr_always_use_vrr_tg(display)) > > - crtc_vtotal = 1; > > > > /* > > * The double buffer latch point for TRANS_VTOTAL diff --git > > a/drivers/gpu/drm/i915/display/intel_vrr.c > > b/drivers/gpu/drm/i915/display/intel_vrr.c > > index cd380fe8fd01..5d9b11185296 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > > @@ -1102,16 +1102,6 @@ void intel_vrr_get_config(struct intel_crtc_state > *crtc_state) > > crtc_state->vrr.vmin += > intel_vrr_vmin_flipline_offset(display); > > } > > > > - /* > > - * For platforms that always use VRR Timing Generator, the > VTOTAL.Vtotal > > - * bits are not filled. Since for these platforms TRAN_VMIN is > always > > - * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the > vtotal for > > - * adjusted_mode. > > - */ > > - if (intel_vrr_always_use_vrr_tg(display)) > > - crtc_state->hw.adjusted_mode.crtc_vtotal = > > - intel_vrr_vmin_vtotal(crtc_state); > > - > > if (HAS_AS_SDP(display)) { > > trans_vrr_vsync = > > intel_de_read(display, > > -- > Jani Nikula, Intel
