On 7/2/2026 9:20 PM, Jani Nikula wrote:
On Mon, 22 Jun 2026, Ankit Nautiyal <[email protected]> wrote:
This reverts commit 4f1cab2e4863d96ce13b8d94151f4848e38c3d5b.
Allowing SCL=0 on platforms with always-on VRR timing generator is
causing underruns and other issues on PTL in some cases.
SCL still needs to be non-zero in certain scenarios. Revert for now
until this is better understood.
Signed-off-by: Ankit Nautiyal <[email protected]>
This would've needed
Fixes: 4f1cab2e4863 ("drm/i915/psr: Allow SCL=0 on platforms with always-on VRR
TG")
to have it be picked up for v7.2-rc2. Please talk to Joonas to ensure it
gets picked up for -rc3.
Hi Jani,
Sorry I missed to add the fixes tag.
I'll coordinate with Joonas to make sure the revert gets picked up for
v7.2-rc3.
Thanks,
Ankit
BR,
Jani.
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 911afb9cb24e..92af21d823a3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1405,9 +1405,6 @@ int _intel_psr_min_set_context_latency(const struct
intel_crtc_state *crtc_state
needs_panel_replay)
return 0;
- if (intel_vrr_always_use_vrr_tg(display))
- return 0;
-
return 1;
}
