The existing CMRR fractional-timing code was permanently
disabled (if (!HAS_CMRR || true)), eDP-only, and relied
on a heuristic to guess when the fractional path was needed.
This series reworks it into a generic, debugfs-driven feature,
which later will be controlled via userspace when respective
uapi will be in-palce.
Mitul Golani (9):
drm/i915/vrr: Return from CMRR compute config in case of PSR2 enabled
drm/i915/vrr: Restrict CMRR enable condition to VRR-TG-default
platforms
drm/i915/vrr: Add per-CRTC vrr/cmrr debugfs control
drm/i915/vrr: Update AS_SDP target_rr_divider based on CMRR config
request
drm/i915/display: Move CMRR crtc_state members under VRR
drm/i915/vrr: Compute CMRR fractional timings generically
drm/i915/vrr: Dump CMRR state in the crtc state dump
drm/i915/vrr: Program CMRR enable/disable from transcoder timings
drm/i915/vrr: Enable cmrr
drivers/gpu/drm/i915/display/intel_cmtg.c | 2 +-
.../drm/i915/display/intel_crtc_state_dump.c | 3 +
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
.../drm/i915/display/intel_display_debugfs.c | 2 +
.../drm/i915/display/intel_display_types.h | 17 +-
drivers/gpu/drm/i915/display/intel_dp.c | 9 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +
drivers/gpu/drm/i915/display/intel_vrr.c | 304 +++++++++++++-----
drivers/gpu/drm/i915/display/intel_vrr.h | 2 +
9 files changed, 257 insertions(+), 98 deletions(-)
--
2.48.1
