On 7/22/2026 10:09 AM, Mitul Golani wrote:
CMRR is reported as supported from DISPLAY_VER >= 20 (HAS_CMRR), but it
is built on top of the VRR timing generator running as the default
timing generator, for now this only happens from DISPLAY_VER >= 30.
Gate the CMRR enable condition (and its readout) on both,
so CMRR is only ever enabled on platforms where the VRR timing
generator is the default.
This is a preparation patch for the upcoming CMRR enable sequence: CMRR
remains disabled for now (the "avoid CMRR" short-circuit above is kept),
and this only refines the condition so that when the enable sequence
lands, CMRR is correctly restricted to VRR-TG-default platforms. This is
in line with the comment above, which keeps CMRR disabled until VRR with
fixed timings is working.
No functional change.
nit: commit message is quite of obfuscated, can be simpler.
--v2:
- Create a separate function to check if CMRR possible
Signed-off-by: Mitul Golani <[email protected]>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 51e4f3309b8b..14f8ac07c911 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -187,15 +187,21 @@ int intel_vrr_vmax_vblank_start(const struct
intel_crtc_state *crtc_state)
return intel_vrr_vmax_vtotal(crtc_state) - crtc_state->vrr.guardband;
}
+static bool intel_vrr_cmrr_possible(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ return (HAS_CMRR(display) && intel_vrr_always_use_vrr_tg(display));
redundant outer parenthesis.
With these,
Reviewed-by: Chaitanya Kumar Borah <[email protected]>
+}
+
static bool
is_cmrr_frac_required(struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(crtc_state);
int calculated_refresh_k, actual_refresh_k, pixel_clock_per_line;
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
/* Avoid CMRR for now till we have VRR with fixed timings working */
- if (!HAS_CMRR(display) || true)
+ if (!intel_vrr_cmrr_possible(crtc_state) || true)
return false;
actual_refresh_k =
@@ -1066,7 +1072,7 @@ void intel_vrr_get_config(struct intel_crtc_state
*crtc_state)
trans_vrr_ctl = intel_de_read(display,
TRANS_VRR_CTL(display, cpu_transcoder));
- if (HAS_CMRR(display))
+ if (intel_vrr_cmrr_possible(crtc_state))
crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE);
if (crtc_state->cmrr.enable) {
