On 8/4/2026 12:23 AM, Uma Shankar wrote:
The AS SDP skip-frame mechanism relies on the AS SDP still being
transmitted (just less often) while Panel Replay is active, so the source
must not stop sending it in the PR active state, nor enter the DC3CO idle
protocol which would suppress it entirely.
When a non-zero skip-frame count is programmed, leave both
PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE and
PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL cleared. The previous behaviour
(honouring disable_as_sdp_when_pr_active and the DC3CO idle protocol) is
retained for the non skip-frame case.
Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Naladala Ramanaidu <[email protected]>
Signed-off-by: Uma Shankar <[email protected]>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 28 +++++++++++++++--------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
b/drivers/gpu/drm/i915/display/intel_alpm.c
index 0f98f02a1848..7e2292f93e1e 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -439,21 +439,31 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
if (intel_dp->as_sdp_supported) {
u32 pr_alpm_ctl =
get_pr_alpm_as_sdp_transmission_time(crtc_state);
+ u32 skip_frames = 0;
+
+ /* AS SDP skip frames field only exists on Xe3LPD+ */
+ if (DISPLAY_VER(display) >= 35)
+ skip_frames =
intel_pr_as_sdp_skip_frames(crtc_state);
if (crtc_state->link_off_after_as_sdp_when_pr_active)
pr_alpm_ctl |=
PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
- if (crtc_state->disable_as_sdp_when_pr_active)
- pr_alpm_ctl |=
PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
- if (intel_display_power_dc3co_allowed(display))
- pr_alpm_ctl |=
PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
- else
+ /*
+ * Skip frames needs the AS SDP to keep flowing during
PR
+ * active, so it is mutually exclusive with disabling
AS SDP
+ * transmission in active and with the DC3CO idle
protocol.
+ */
+ if (skip_frames) {
+ pr_alpm_ctl |=
PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
+ pr_alpm_ctl &=
~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
pr_alpm_ctl &=
~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
+ } else {
+ if (crtc_state->disable_as_sdp_when_pr_active)
+ pr_alpm_ctl |=
PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
- /* AS SDP skip frames field only exists on Xe3LPD+ */
- if (DISPLAY_VER(display) >= 35)
- pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(
-
intel_pr_as_sdp_skip_frames(crtc_state));
+ if (intel_display_power_dc3co_allowed(display))
+ pr_alpm_ctl |=
PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
Do we also need to clear the AS SDP skip frame bits here?
Otherwise, LGTM.
Regards,
Dibin
+ }
intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
pr_alpm_ctl);
