On Thu, 05 Nov 2026, Ville Syrjala <[email protected]> wrote:
> From: Ville Syrjälä <[email protected]>
>
> The Gunit misc interrupts (GEN11_GU_MISC_*) aren't a display thing.
> Currently the irq ack/handler live in intel_display_irq.c, whereas
> the irq reset/postingstall lives in i915_irq.c.
>
> gen11_gu_misc_irq_ack() belongs with its reset/postinstall
> counterparts in i915_irq.c, so move it there. The handler we'll
> leave in the display code.
>
> Signed-off-by: Ville Syrjälä <[email protected]>

Reviewed-by: Jani Nikula <[email protected]>

This could be followed up with moving GEN11_GU_MISC_* macros from
include/drm/intel/intel_gmd_interrupt_regs.h to an i915 core internal
header.

> ---
>  .../gpu/drm/i915/display/intel_display_irq.c  | 23 ++---------------
>  .../gpu/drm/i915/display/intel_display_irq.h  |  3 +--
>  drivers/gpu/drm/i915/i915_irq.c               | 25 ++++++++++++++++---
>  3 files changed, 24 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c 
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index b8d7e8de4ee8..af8d6737d36c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1587,28 +1587,9 @@ static bool gen8_display_irq_handler(struct 
> intel_display *display,
>       return true;
>  }
>  
> -u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 
> master_ctl)
> +void gen11_gu_misc_irq_handler(struct intel_display *display)
>  {
> -     u32 iir;
> -
> -     if (!(master_ctl & GEN11_GU_MISC_IRQ))
> -             return 0;
> -
> -     intel_display_rpm_assert_block(display);
> -
> -     iir = intel_de_read_fw(display, GEN11_GU_MISC_IIR);
> -     if (likely(iir))
> -             intel_de_write_fw(display, GEN11_GU_MISC_IIR, iir);
> -
> -     intel_display_rpm_assert_unblock(display);
> -
> -     return iir;
> -}
> -
> -void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir)
> -{
> -     if (iir & GEN11_GU_MISC_GSE)
> -             intel_opregion_asle_intr(display);
> +     intel_opregion_asle_intr(display);
>  }
>  
>  static bool gen11_display_irq_handler(struct intel_display *display,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h 
> b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index 84446bf53401..00dfed88eab7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -52,8 +52,7 @@ void bdw_disable_vblank(struct drm_crtc *crtc);
>  void ilk_display_irq_master_disable(struct intel_display *display, u32 
> *de_ier, u32 *sde_ier);
>  void ilk_display_irq_master_enable(struct intel_display *display, u32 
> de_ier, u32 sde_ier);
>  
> -u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 
> master_ctl);
> -void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
> +void gen11_gu_misc_irq_handler(struct intel_display *display);
>  
>  struct intel_display_irq_state {
>       u32 master_ctl;
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 932409b943ad..1d03ac90b7e2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -491,6 +491,21 @@ static inline void gen11_master_intr_enable(void __iomem 
> * const regs)
>       raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
>  }
>  
> +static u32 gen11_gu_misc_irq_ack(void __iomem * const regs,
> +                              u32 master_ctl)
> +{
> +     u32 iir;
> +
> +     if (!(master_ctl & GEN11_GU_MISC_IRQ))
> +             return 0;
> +
> +     iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
> +     if (likely(iir))
> +             raw_reg_write(regs, GEN11_GU_MISC_IIR, iir);
> +
> +     return iir;
> +}
> +
>  static irqreturn_t gen11_irq_handler(int irq, void *arg)
>  {
>       struct drm_i915_private *i915 = arg;
> @@ -516,11 +531,12 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>       if (master_ctl & GEN11_DISPLAY_IRQ)
>               intel_display_irq_handler(display, NULL);
>  
> -     gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
> +     gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
>  
>       gen11_master_intr_enable(regs);
>  
> -     gen11_gu_misc_irq_handler(display, gu_misc_iir);
> +     if (gu_misc_iir & GEN11_GU_MISC_GSE)
> +             gen11_gu_misc_irq_handler(display);
>  
>       pmu_irq_stats(i915, IRQ_HANDLED);
>  
> @@ -583,11 +599,12 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
>       if (master_ctl & GEN11_DISPLAY_IRQ)
>               intel_display_irq_handler(display, NULL);
>  
> -     gu_misc_iir = gen11_gu_misc_irq_ack(display, master_ctl);
> +     gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
>  
>       dg1_master_intr_enable(regs);
>  
> -     gen11_gu_misc_irq_handler(display, gu_misc_iir);
> +     if (gu_misc_iir & GEN11_GU_MISC_GSE)
> +             gen11_gu_misc_irq_handler(display);
>  
>       pmu_irq_stats(i915, IRQ_HANDLED);

-- 
Jani Nikula, Intel

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