In the future, the register typedefs and macros will be completely separated between i915 and display. Add a display INTEL_REG_INVALID macro to ease the transition away from INVALID_MMIO_REG.
Signed-off-by: Jani Nikula <[email protected]> --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_display_reg_defs.h | 4 +++- drivers/gpu/drm/i915/display/intel_dmc.c | 2 +- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 4 ++-- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +- drivers/gpu/drm/i915/display/intel_encoder.c | 4 ++-- drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/display/intel_pps.c | 2 +- 8 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 45cfc2758881..e21c237b39f4 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4988,7 +4988,7 @@ static int intel_ddi_init_hdmi_connector(struct intel_digital_port *dig_port) * pins or not having enough lanes. Handle them gracefully, but * don't fail the entire DDI init. */ - dig_port->hdmi.hdmi_reg = INVALID_MMIO_REG; + dig_port->hdmi.hdmi_reg = INTEL_REG_INVALID; kfree(connector); } diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h index 9220fcbfcb24..d50bcebd58e5 100644 --- a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h +++ b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h @@ -10,6 +10,8 @@ typedef i915_reg_t intel_reg_t; +#define INTEL_REG_INVALID _MMIO(0) + static inline u32 intel_reg_offset(intel_reg_t r) { return r.reg; @@ -22,7 +24,7 @@ static inline bool intel_reg_equal(intel_reg_t a, intel_reg_t b) static inline bool intel_reg_valid(intel_reg_t r) { - return !intel_reg_equal(r, INVALID_MMIO_REG); + return !intel_reg_equal(r, INTEL_REG_INVALID); } /* A triplet for IMR/IER/IIR registers. */ diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 56e831b2a826..4f07201fc334 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -1689,7 +1689,7 @@ static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused) struct intel_display *display = m->private; struct intel_dmc *dmc = display_to_dmc(display); struct ref_tracker *wakeref; - intel_reg_t dc5_reg, dc6_reg = INVALID_MMIO_REG; + intel_reg_t dc5_reg, dc6_reg = INTEL_REG_INVALID; u32 dc6_allowed_count; if (!HAS_DMC(display)) diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index ab4e0e9573df..c181c1a7ba08 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -504,10 +504,10 @@ void intel_dmc_wl_put(struct intel_display *display, intel_reg_t reg) void intel_dmc_wl_get_noreg(struct intel_display *display) { - intel_dmc_wl_get(display, INVALID_MMIO_REG); + intel_dmc_wl_get(display, INTEL_REG_INVALID); } void intel_dmc_wl_put_noreg(struct intel_display *display) { - intel_dmc_wl_put(display, INVALID_MMIO_REG); + intel_dmc_wl_put(display, INTEL_REG_INVALID); } diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index df0c258f53f1..b28fa4785c60 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -3815,7 +3815,7 @@ static void icl_dpll_write(struct intel_display *display, const struct icl_dpll_hw_state *hw_state) { const enum intel_dpll_id id = pll->info->id; - intel_reg_t cfgcr0_reg, cfgcr1_reg, div0_reg = INVALID_MMIO_REG; + intel_reg_t cfgcr0_reg, cfgcr1_reg, div0_reg = INTEL_REG_INVALID; if (display->platform.alderlake_s) { cfgcr0_reg = ADLS_DPLL_CFGCR0(id); diff --git a/drivers/gpu/drm/i915/display/intel_encoder.c b/drivers/gpu/drm/i915/display/intel_encoder.c index d01b081a6074..86edcc62914e 100644 --- a/drivers/gpu/drm/i915/display/intel_encoder.c +++ b/drivers/gpu/drm/i915/display/intel_encoder.c @@ -112,8 +112,8 @@ struct intel_digital_port *intel_dig_port_alloc(void) if (!dig_port) return NULL; - dig_port->hdmi.hdmi_reg = INVALID_MMIO_REG; - dig_port->dp.output_reg = INVALID_MMIO_REG; + dig_port->hdmi.hdmi_reg = INTEL_REG_INVALID; + dig_port->dp.output_reg = INTEL_REG_INVALID; dig_port->aux_ch = AUX_CH_NONE; dig_port->max_lanes = 4; diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index b6fa1a1558b8..4ec0db8d93fb 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -198,7 +198,7 @@ hsw_dip_data_reg(struct intel_display *display, return GLK_TVIDEO_DIP_DRM_DATA(display, cpu_transcoder, i); default: MISSING_CASE(type); - return INVALID_MMIO_REG; + return INTEL_REG_INVALID; } } diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 8f1bfe434097..442b00491a88 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -519,7 +519,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp, /* Cycle delay moved from PP_DIVISOR to PP_CONTROL */ if (display->platform.geminilake || display->platform.broxton || INTEL_PCH_TYPE(display) >= PCH_CNP) - regs->pp_div = INVALID_MMIO_REG; + regs->pp_div = INTEL_REG_INVALID; else regs->pp_div = PP_DIVISOR(display, pps_idx); } -- 2.47.3
