Just like during booting the BIOS can leave the VDD bit enabled after
system resume. So apply the same state sanitization there too. This
fixes a problem where after resume the port power domain refcount gets
unbalanced.
Reported-by: Jarkko Nikula <jarkko.nik...@intel.com>
Signed-off-by: Imre Deak <imre.d...@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 065984d..8989069 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12875,6 +12875,12 @@ void intel_modeset_setup_hw_state(struct drm_device
*dev,
/* HW state is read out, now we need to sanitize this mess. */
list_for_each_entry(encoder, &dev->mode_config.encoder_list,
base.head) {
+ /*
+ * Do the following only during resume, since at driver
+ * loading it's done early when initializing the encoder.
+ */
+ if (force_restore)
+ intel_edp_panel_vdd_sanitize(encoder);
intel_sanitize_encoder(encoder);
}
--
1.8.4
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