Notifying the BIOS about CDCLK changes lets it program audio controller EM4/EM5 divider values accordingly.
Signed-off-by: Jani Nikula <[email protected]> --- drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ drivers/gpu/drm/i915/intel_opregion.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 8cea59649ef2..2feb8215f9fa 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2602,6 +2602,7 @@ extern int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, bool enable); extern int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state); +extern int intel_opregion_notify_cdclk(struct drm_device *dev, int cdclk); #else static inline int intel_opregion_setup(struct drm_device *dev) { return 0; } static inline void intel_opregion_init(struct drm_device *dev) { return; } @@ -2617,6 +2618,11 @@ intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state) { return 0; } +static inline int +intel_opregion_notify_cdclk(struct drm_device *dev, int cdclk) +{ + return 0; +} #endif /* intel_acpi.c */ diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c index 2e2c71fcc9ed..6450d2625624 100644 --- a/drivers/gpu/drm/i915/intel_opregion.c +++ b/drivers/gpu/drm/i915/intel_opregion.c @@ -219,6 +219,7 @@ struct opregion_asle { #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18) #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19) #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21) +#define SWSCI_SBCB_CD_CLOCK_CHANGE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 22) #define ACPI_OTHER_OUTPUT (0<<8) #define ACPI_VGA_OUTPUT (1<<8) @@ -395,6 +396,34 @@ int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state) return -EINVAL; } +int intel_opregion_notify_cdclk(struct drm_device *dev, int cdclk) +{ + u32 parm; + + if (!IS_BROADWELL(dev)) + return 0; + + switch (cdclk) { + case 337500: + parm = 2; + break; + case 450000: + parm = 0; + break; + case 540000: + parm = 1; + break; + case 675000: + parm = 3; + break; + default: + WARN_ONCE(1, "unknown cdclk %d\n", cdclk); + return -EINVAL; + } + + return swsci(dev, SWSCI_SBCB_CD_CLOCK_CHANGE, parm, NULL); +} + static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) { struct drm_i915_private *dev_priv = dev->dev_private; -- 2.0.0 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
