On Tue, Jul 15, 2014 at 09:17:41AM +0200, Daniel Vetter wrote: > From: Damien Lespiau <[email protected]> > > No need to list all the platforms explicitly. > > The prefix is a bit inconsistent since we usually pick gen8_ for GT > related functions. But this anti-pattern is already established with snb, > so material for a different patch. > > Cc: Damien Lespiau <[email protected]> > Signed-off-by: Daniel Vetter <[email protected]>
Reviewed-by: Damien Lespiau <[email protected]> -- Damien > --- > drivers/gpu/drm/i915/i915_irq.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index c03367af7a8e..e12dfdf4b720 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1403,7 +1403,7 @@ static void gen6_pm_rps_work(struct work_struct *work) > spin_lock_irq(&dev_priv->irq_lock); > pm_iir = dev_priv->rps.pm_iir; > dev_priv->rps.pm_iir = 0; > - if (IS_BROADWELL(dev_priv->dev) || IS_CHERRYVIEW(dev_priv->dev)) > + if (INTEL_INFO(dev_priv->dev)->gen >= 8) > bdw_enable_pm_irq(dev_priv, dev_priv->pm_rps_events); > else { > /* Make sure not to corrupt PMIMR state used by ringbuffer */ > -- > 1.9.3 > _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
