On Thu, 18 Sep 2014, Daniel Vetter <[email protected]> wrote:
> On Thu, Sep 18, 2014 at 07:03:32AM +0100, Chris Wilson wrote:
>> As we use WC updates of the PTE, we are responsible for notifying the
>> hardware when to flush its TLBs. Do so after we zap all the PTEs before
>> suspend (and the BIOS tries to read our GTT).
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82340
>> Tested-by: [email protected]
>> Signed-off-by: Chris Wilson <[email protected]>
>
> This fixes a regression from the (functional) revert
>
> drm/i915: Undo gtt scratch pte unmapping again
>
> It apparently blows up on some machines. This functionally reverts
>
> commit 828c79087cec61eaf4c76bb32c222fbe35ac3930
> Author: Ben Widawsky <[email protected]>
> Date: Wed Oct 16 09:21:30 2013 -0700
>
> drm/i915: Disable GGTT PTEs on GEN6+ suspend
>
> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64841
> Reported-and-Tested-by: Brad Jackson <[email protected]>
> Cc: [email protected]
> Cc: Takashi Iwai <[email protected]>
> Cc: Paulo Zanoni <[email protected]>
> Cc: Todd Previte <[email protected]>
> Signed-off-by: Daniel Vetter <[email protected]>
> Signed-off-by: Dave Airlie <[email protected]>
>
> Cc: [email protected]
> Cc: Takashi Iwai <[email protected]>
> Cc: Paulo Zanoni <[email protected]>
> Cc: Todd Previte <[email protected]>
> Cc: Daniel Vetter <[email protected]>
> Reviewed-by: Daniel Vetter <[email protected]>
>
> When fixing regressions pls don't forget to cite the offending commit and
> cc all relevant people. Jani, please amend the commit with the above when
> merging.
The patch fails to apply on any branch. Please refresh.
BR,
Jani.
>
> Aside: This means that the bios writes to various ranges in the gtt, so I
> still think we need to insert ptes pointing at stolen, too. Otherwise
> we've simply reduced the chances for this bug to destroy important
> something I think.
> -Daniel
>
>
>> ---
>> drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++++++++++++-
>> 1 file changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index 97ba18846761..aa81b217fac0 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -1234,6 +1234,16 @@ void i915_check_and_clear_faults(struct drm_device
>> *dev)
>> POSTING_READ(RING_FAULT_REG(RCS_ENGINE(dev_priv)));
>> }
>>
>> +static void i915_ggtt_flush(struct drm_i915_private *dev_priv)
>> +{
>> + if (INTEL_INFO(dev_priv)->gen < 6) {
>> + intel_gtt_chipset_flush();
>> + } else {
>> + I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
>> + POSTING_READ(GFX_FLSH_CNTL_GEN6);
>> + }
>> +}
>> +
>> void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
>> {
>> struct drm_i915_private *dev_priv = dev->dev_private;
>> @@ -1250,6 +1260,8 @@ void i915_gem_suspend_gtt_mappings(struct drm_device
>> *dev)
>> dev_priv->gtt.base.start,
>> dev_priv->gtt.base.total,
>> true);
>> +
>> + i915_ggtt_flush(dev_priv);
>> }
>>
>> void i915_gem_restore_gtt_mappings(struct drm_device *dev)
>> @@ -1302,7 +1314,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device
>> *dev)
>> gen6_write_pdes(container_of(vm, struct i915_hw_ppgtt, base));
>> }
>>
>> - i915_gem_chipset_flush(dev);
>> + i915_ggtt_flush(dev_priv);
>> }
>>
>> int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
>> --
>> 2.1.0
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> [email protected]
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
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