On Fri, Oct 24, 2014 at 01:40:35PM +0100, Chris Wilson wrote:
> On Wed, May 28, 2014 at 01:10:55PM +0100, Chris Wilson wrote:
> > On Tue, May 27, 2014 at 09:33:09PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index 94ac51f..cb9dd8e 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -8895,6 +8895,10 @@ static bool page_flip_finished(struct intel_crtc
> > > *crtc)
> > > struct drm_device *dev = crtc->base.dev;
> > > struct drm_i915_private *dev_priv = dev->dev_private;
> > >
> > > + if (i915_reset_in_progress(&dev_priv->gpu_error) ||
> > > + crtc->reset_counter !=
> > > atomic_read(&dev_priv->gpu_error.reset_counter))
> > > + return true;
> >
> > I really don't like this. The reset_count is incremented when the reset
> > starts, so we shouldn't get here with
> > crtc->reset_counter == gpu_error->reset_counter && reset_in_progress().
> >
> > I'd prefer this to be
> > if (i915_has_reset(dev_priv, crtc->reset_counter)) return true;
> >
> > with a guard when reading the gpu reset_counter:
> >
> > ret = i915_get_reset_counter(dev_priv, &intel_crtc->reset_counter);
> > if (ret)
> > goto cleanup;
> >
> > that does something like
> >
> > static inline int i915_get_reset_counter(struct drm_i915_private *dev_priv,
> > int *value)
> > {
> > *value = atomic_read(dev_priv->gpu_error.reset_counter);
> > if (*value & I915_WEDGED)
> > return -EIO;
> > if (*value & I915_RESET_IN_PROGRESS_FLAG)
> > return -EAGAIN;
> > return 0;
> > }
>
> Bleh, I've seen the light and this is overly complicated and doesn't
> actually help make the code more readable than
>
> if (intel_crtc->reset_counter !=
> atomic_read(&dev_priv->gpu_error.reset_counter))
> return true;
>
> The original patch is
> Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk>
Thanks. I think we need cc:stable on this now.
--
Ville Syrjälä
Intel OTC
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