Michel Thierry <[email protected]> writes:

> From: Ben Widawsky <[email protected]>
>
> We have some fanciness coming up. This patch just breaks out the logic
> of context switch skip, pd load pre, and pd load post.
>
> v2: Use new functions to replace the logic right away (Daniel)
>
> Cc: Daniel Vetter <[email protected]>
> Signed-off-by: Ben Widawsky <[email protected]>
> Signed-off-by: Michel Thierry <[email protected]> (v2)
> ---
>  drivers/gpu/drm/i915/i915_gem_context.c | 40 
> +++++++++++++++++++++++++--------
>  1 file changed, 31 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
> b/drivers/gpu/drm/i915/i915_gem_context.c
> index 755b415..6206d27 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -565,6 +565,33 @@ mi_set_context(struct intel_engine_cs *ring,
>       return ret;
>  }
>  
> +static inline bool should_skip_switch(struct intel_engine_cs *ring,
> +                                   struct intel_context *from,
> +                                   struct intel_context *to)
> +{
> +     if (from == to && !to->remap_slice)
> +             return true;
> +
> +     return false;
> +}
> +
> +static bool
> +needs_pd_load_pre(struct intel_engine_cs *ring, struct intel_context *to)
> +{
> +     struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +
> +     return ((INTEL_INFO(ring->dev)->gen < 8) ||
> +                     (ring != &dev_priv->ring[RCS])) && to->ppgtt;
> +}
> +
> +static bool
> +needs_pd_load_post(struct intel_engine_cs *ring, struct intel_context *to)
> +{
> +     return (!to->legacy_hw_ctx.initialized ||
> +                     i915_gem_context_is_default(to)) &&
> +                     to->ppgtt && IS_GEN8(ring->dev);
> +}
> +
>  static int do_switch(struct intel_engine_cs *ring,
>                    struct intel_context *to)
>  {
> @@ -573,9 +600,6 @@ static int do_switch(struct intel_engine_cs *ring,
>       u32 hw_flags = 0;
>       bool uninitialized = false;
>       struct i915_vma *vma;
> -     bool needs_pd_load_pre = ((INTEL_INFO(ring->dev)->gen < 8) ||
> -                     (ring != &dev_priv->ring[RCS])) && to->ppgtt;
> -     bool needs_pd_load_post = false;

There is no such code in drm-intel-nightly. On top of which tree this is
for?

-Mika

>       int ret, i;
>  
>       if (from != NULL && ring == &dev_priv->ring[RCS]) {
> @@ -583,7 +607,7 @@ static int do_switch(struct intel_engine_cs *ring,
>               BUG_ON(!i915_gem_obj_is_pinned(from->legacy_hw_ctx.rcs_state));
>       }
>  
> -     if (from == to && !to->remap_slice)
> +     if (should_skip_switch(ring, from, to))
>               return 0;
>  
>       /* Trying to pin first makes error handling easier. */
> @@ -601,7 +625,7 @@ static int do_switch(struct intel_engine_cs *ring,
>        */
>       from = ring->last_context;
>  
> -     if (needs_pd_load_pre) {
> +     if (needs_pd_load_pre(ring, to)) {
>               /* Older GENs and non render rings still want the load first,
>                * "PP_DCLV followed by PP_DIR_BASE register through Load
>                * Register Immediate commands in Ring Buffer before submitting
> @@ -646,16 +670,14 @@ static int do_switch(struct intel_engine_cs *ring,
>        * XXX: If we implemented page directory eviction code, this
>        * optimization needs to be removed.
>        */
> -     if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to)) {
> +     if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
>               hw_flags |= MI_RESTORE_INHIBIT;
> -             needs_pd_load_post = to->ppgtt && IS_GEN8(ring->dev);
> -     }
>  
>       ret = mi_set_context(ring, to, hw_flags);
>       if (ret)
>               goto unpin_out;
>  
> -     if (needs_pd_load_post) {
> +     if (needs_pd_load_post(ring, to)) {
>               ret = to->ppgtt->switch_mm(to->ppgtt, ring);
>               /* The hardware context switch is emitted, but we haven't
>                * actually changed the state - so it's probably safe to bail
> -- 
> 2.1.1
>
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