On Sun, Mar 08, 2015 at 02:00:43PM -0700, Matt Roper wrote: > With the switch to atomic plumbing for planes, some of our commit-time > work (e.g., watermarks) is done after the new atomic state is swapped > into the relevant DRM object, but before the DRM core has a chance to > update its legacy state values. Switch intel_crtc_active() to look at > the state objects rather than legacy fields to ensure we operate on the > proper values. > > Suggested-by: Ville Syrjälä <[email protected]> > Signed-off-by: Matt Roper <[email protected]>
This gets used from the wm code and for that I think it's correct in the sense that it'll preventt oopses, and from the FBC code which is.. well yeah. So this is Reviewed-by: Ville Syrjälä <[email protected]> And due to this I think you can for now drop all the plane->state->fb checks you add in patch 5/5 to the pre-ilk platforms' wm code. We'll need to eventually change all that code to consider disabled planes correctly, but for now just not oopsing is good enough I think. > --- > drivers/gpu/drm/i915/intel_display.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index b11528f..4f8c622d 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -886,8 +886,6 @@ chv_find_best_dpll(const intel_limit_t *limit, struct > intel_crtc *crtc, > > bool intel_crtc_active(struct drm_crtc *crtc) > { > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > - > /* Be paranoid as we can arrive here with only partial > * state retrieved from the hardware during setup. > * > @@ -897,8 +895,8 @@ bool intel_crtc_active(struct drm_crtc *crtc) > * We can ditch the crtc->primary->fb check as soon as we can > * properly reconstruct framebuffers. > */ > - return crtc->state->active && crtc->primary->fb && > - intel_crtc->config->base.adjusted_mode.crtc_clock; > + return crtc->state->active && crtc->primary->state->fb && > + crtc->state->adjusted_mode.crtc_clock; > } > > enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private > *dev_priv, > -- > 1.8.5.1 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
