On 20/03/2015 10:33, Deak, Imre wrote:
On Fri, 2015-03-20 at 09:07 +0000, Nick Hoath wrote:
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky <[email protected]>
Signed-off-by: Ben Widawsky <[email protected]>
Signed-off-by: Imre Deak <[email protected]>
Bearing in mind having to revisit all these with the stepping checks:
Reviewed-by: Nick Hoath <[email protected]>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e23cbdc..000f608 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -970,8 +970,8 @@ static int gen9_init_workarounds(struct intel_engine_cs
*ring)
* FIXME: don't apply the following on BXT for stepping C. On BXT A0
* the flag reads back as 0.
*/
- /* WaDisableMaskBasedCammingInRCC:bxtA */
- if (IS_BROXTON(dev))
+ /* WaDisableMaskBasedCammingInRCC:sklC,bxtA */
+ if (INTEL_REVID(dev) == SKL_REVID_C0 || IS_BROXTON(dev))
This looks wrong. (IS_BROXTON && BXT_REVID_C0) || (IS_SKYLAKE &&
SKL_REVID_C0) please.
It's correct though. gen9_init_workarounds() is called for Skylake or
Broxton, so the condition is true either on Broxton regardless of the
stepping, or on Skylake if the revid matches.
Also on Broxton we have to _exclude_ the workaround on C0, so if we add
the revid check for Broxton too, then we have to rewrite the condition
to:
(IS_BROXTON && INTEL_REVID != BXT_REVID_C0) || (IS_SKYLAKE &&
INTEL_REVID == SKL_REVID_C0)
WA_SET_BIT_MASKED(SLICE_ECO_CHICKEN0,
PIXEL_MASK_CAMMING_DISABLE);
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